(VAA = +5 V, V
參數(shù)資料
型號(hào): ADV7127JRUZ240
廠商: Analog Devices Inc
文件頁(yè)數(shù): 2/16頁(yè)
文件大小: 0K
描述: IC DAC VIDEO240MHZ 3.3/5 24TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 15ns
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 30mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 240M
產(chǎn)品目錄頁(yè)面: 786 (CN2011-ZH PDF)
ADV7127
–10–
REV. 0
5 V–Typical Performance Characteristics
(VAA = +5 V, VREF = 1.235 V, IOUT = 17.62 A, 50
Doubly Terminated Load, Differential Output Loading, TA = +25 C)
FREQUENCY – MHz
70
0
0.1
100
1.0
2.51
5.04
20.2
40.4
60
50
40
20
10
30
SFDR (DE)
SFDR (SE)
SFDR
dBc
Figure 2. SFDR vs. fOUT @ fCLOCK =
140 MHz (Single-Ended and
Differential)
fCLOCK – MHz
76
74
58
0
160
50
100
140
68
64
62
60
72
70
66
4th HARMONIC
2nd HARMONIC
3rd HARMONIC
THD
dBc
Figure 5. THD vs. fCLOCK @ fOUT =
2 MHz (2nd, 3rd and 4th Harmonics)
VAA = 5V
1
2
–5.0
–45.0
–85.0
0kHz
START
35.0MHz
70.0MHz
STOP
SFDR
dBm
CLK = 140MHz
fOUT = 2.5MHz
SING O/P
Figure 8. SFDR (Single-Tone) @
fCLOCK = 140 MHz (fOUT1 = 2 MHz)
FREQUENCY – MHz
80
0
70
40
30
20
10
60
50
0.1
100
1.0
2.51
5.04
20.2
40.4
SFDR (SE)
SFDR (DE)
SFDR
dBc
Figure 3. SFDR vs. fOUT @ fCLOCK =
50 MHz (Single-Ended and
Differential)
IOUT/mA
1.0
0.9
0.0
020
2
17.62
0.4
0.3
0.2
0.1
0.6
0.5
0.8
0.7
LINEARITY vs. IOUT ERROR
LINEARITY
LSBs
Figure 6. Linearity vs. IOUT
VAA = 5V
1
2
–5.0
–45.0
–85.0
0kHz
START
35.0MHz
70.0MHz
STOP
SFDR
dBm
CLK = 140MHz
fOUT = 20MHz
SING O/P
Figure 9. Single-Tone SFDR @ fCLOCK
= 140 MHz (fOUT1 = 20 MHz)
TEMPERATURE – C
72.0
71.8
70.4
–10
+25
+85
71.2
71.0
70.8
70.6
71.6
71.4
72.2
SFDR
dBc
Figure 4. SFDR vs. Temperature @
fCLOCK = 50 MHz (fOUT = 1 MHz)
1.00
0.50
–1.00
0.00
–0.50
CODE – INL
1023
0.75
–0.16
ERROR
LSB
Figure 7. Typical Linearity
VAA = 5V
1
–5.0
–45.0
–85.0
0kHz
START
35.0MHz
70.0MHz
STOP
SFDR
dBc
CLK = 140MHz
DUAL TONE
DIFF O/P
2
Figure 10. Dual-Tone SFDR @ fCLOCK
= 140 MHz (fOUT1 = 13.5 MHz, fOUT2 =
14.5 MHz)
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