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參數(shù)資料
| 型號： | ADV7125WBCPZ170 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC VIDEO 3-CH 330MHZ 48VFQFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 8 |
| 轉(zhuǎn)換器數(shù)目： | 3 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 30mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 6 電流，單極 |
| 采樣率（每秒）： | 170M |
ADV7125
Rev. C | Page 9 of 16
Pin Number
Mnemonic
Description
37
RSET
A resistor (RSET) connected between this pin and GND controls the magnitude of the full-scale video
signal. Note that the IRE relationships are maintained, regardless of the full-scale output current. The
relationship between RSET and the full-scale output current on IOG (assuming ISYNC is connected to IOG)
is given by:
RSET (Ω) = 11,445 × VREF (V)/IOG (mA)
The relationship between RSET and the full-scale output current on IOR, IOG, and IOB is given by:
IOG (mA) = 11,444.8 × VREF (V)/RSET (Ω) (SYNC being asserted)
IOR, IOB (mA) = 7989.6 × VREF (V)/RSET (Ω)
The equation for IOG is the same as that for IOR and IOB when SYNC is not being used, that is, SYNC
tied permanently low.
38
PSAVE
Power Save Control Pin. Reduced power consumption is available on the ADV7125 when this pin is
active.
49 (EPAD)
EP (EPAD)
The LFCSP_VQ has an exposed paddle that must be connected to GND.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7125WBCPZ170-RL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| ADV7125WBSTZ170 | 制造商:Analog Devices 功能描述:330MHZ TRIPLE 8-BIT HIGH SPEED VIDEO DAC - Rail/Tube |
| ADV7125WBSTZ170-RL | 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS, 330 MHz Triple 8-Bit High Speed Video DAC |
| ADV7127 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS, 240 MHz 10-Bit High Speed Video DAC |
| ADV7127JR240 | 制造商:Rochester Electronics LLC 功能描述:SINGLE HIGH SPEED VIDEO DAC I.C. - Bulk 制造商:Analog Devices 功能描述: |
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