參數資料
型號： ADV7123JST240
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： CMOS, 240 MHz Triple 10-Bit High Speed Video DAC
中文描述： PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48
封裝： PLASTIC, MS-026BBC, LQFP-48
文件頁數： 7/20頁
文件大?。?/td> 342K
代理商： ADV7123JST240
–7–
REV. B
ADV7123
3.3 V TIMING SPECIFICATIONS
1
Parameter
Min
Typ
Max
Unit
Condition
ANALOG OUTPUTS
Analog Output Delay, t
6
Analog Output Rise/Fall Time, t
74
Analog Output Transition Time, t
85
Analog Output Skew, t
96
CLOCK CONTROL
f
CLK7
f
CLK7
f
CLK7
f
CLK7
Data and Control Setup, t
1
Data and Control Hold, t
2
Clock Pulsewidth High, t
46
Clock Pulsewidth Low, t
56
Clock Pulsewidth High, t
4
Clock Pulsewidth Low t
5
Clock Pulsewidth High t
4
Clock Pulsewidth Low t
5
Clock Pulsewidth High t
4
Clock Pulsewidth Low t
5
Pipeline Delay, t
PD6
PSAVE
Up Time, t
106
7.5
1.0
15
1
ns
ns
ns
ns
2
50
140
240
330
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Clock Cycles
ns
50 MHz Grade
140 MHz Grade
240 MHz Grade
330 MHz Grade
0.2
1.5
1.4
1.4
1.875
1.875
2.85
2.85
8.0
8.0
1.0
f
CLK_MAX
= 330 MHz
f
CLK_MAX
= 330 MHz
f
CLK_MAX
= 240 MHz
f
CLK_MAX
= 240 MHz
f
CLK_MAX
= 140 MHz
f
CLK_MAX
= 140 MHz
f
CLK_MAX
= 50 MHz
f
CLK_MAX
= 50 MHz
1.0
4
1.0
10
NOTES
1
Timing specifications are measured with input levels of 3.0 V (V
IH
) and 0 V (V
IL
) 0 for both 5 V and 3.3 V supplies.
2
These maximum and minimum specifications are guaranteed over this range.
3
Temperature range: T
MIN
to T
MAX
: –40
°
C to +85
°
C at 50 MHz and 140 MHz, 0
°
C to 70
°
C at 240 MHz and 330 MHz.
4
Rise time was measured from the 10% to 90% point of zero to full-scale transition, fall time from the 90% to 10% point of a full-scale transition.
5
Measured from 50% point of full-scale transition to 2% of final value.
6
Guaranteed by characterization.
7
f
CLK
max specification production tested at 125 MHz; 5 V limits specified here are guaranteed by characterization.
Specifications subject to change without notice.
t
2
CLOCK
DATA
NOTES
t
) MEASURED FROM THE 50% POINT OF THE RISING EDGE OF CLOCK
TO THE 50% POINT OF FULL-SCALE TRANSITION.
2. OUTPUT RISE/FALL TIME (
t
) MEASURED BETWEEN THE 10% AND 90% POINTS OF FULL-SCALE TRANSITION.
3. TRANSITION TIME (
t
) MEASURED FROM THE 50% POINT OF FULL-SCALE TRANSITION
TO WITHIN 2% OF THE FINAL OUTPUT VALUE.
ANALOG OUTPUTS
(IOR,
IOR
, IOG,
IOG
, IOB,
IOB
)
DIGITAL INPUTS
(R9–R0, G9–G0, B9–B0,
SYNC
,
BLANK
)
t
3
t
4
t
5
t
1
t
8
t
6
t
7
Figure 1. Timing Diagram
(V
AA
= 3.0 V–3.6 V
2
, V
REF
= 1.235 V, R
SET
= 560
T
MAX3
, unless otherwise noted, T
J
MAX
= 110 C.)
, C
L
= 10 pF. All specifications T
MIN
to
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