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參數(shù)資料
| 型號： | ADV7120KPZ80 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC VIDEO 3CH 80MHZ 44PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時間： | 12ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 3 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 625mW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 3 電流，單極 |
| 采樣率（每秒）： | 80M |
ADV7120
REV. B
–10–
PC BOARD LAYOUT CONSIDERATIONS
The ADV7120 is optimally designed for lowest noise perfor-
mance, both radiated and conducted noise. To complement the
excellent noise performance of the ADV7120, it is imperative
that great care be given to the PC board layout. Figure 8 shows
a recommended connection diagram for the ADV7120.
The layout should be optimized for lowest noise on the
ADV7120 power and ground lines. This can be achieved by
shielding the digital inputs and providing good decoupling. The
lead length between groups of VAA and GND pins should by
minimized so as to minimize inductive ringing.
Ground Planes
The ADV7120 and associated analog circuitry, should have a
separate ground plane referred to as the analog ground plane.
This ground plane should connect to the regular PCB ground
plane at a single point through a ferrite bead, as illustrated in
Figure 8. This bead should be located as close as possible
(within 3 inches) to the ADV7120.
The analog ground plane should encompass all ADV7120
ground pins, voltage reference circuitry, power supply bypass
circuitry, the analog output traces and any output amplifiers.
The regular PCB ground plane area should encompass all the
digital signal traces, excluding the ground pins, leading up to
the ADV7120.
GND
FS ADJUST
IOR
IOG
IOB
GROUND
ADV7120
C3
0.1
F
C5
0.1
F
Z1 (AD589)
R1
75
R2
75
R3
75
C1
33
F
C2
10
F
COMP
C6
0.1
F
ANALOG POWER PLANE
V
AA
V
REF
L2 (FERRITE BEAD)
R0
R7
G0
G7
B0
B7
CLOCK
REF WHITE
SYNC
BLANK
RGB
VIDEO
OUTPUT
VIDEO
DATA
INPUTS
VIDEO
CONTROL
INPUTS
ANALOG GROUND PLANE
C4
0.1
F
R
SET
560
L1 (FERRITE BEAD)
+5V (V
CC )
I
SYNC
SET
COMPONENT
C1
C2
C3, C4, C5, C6
L1, L2
R1, R2, R3
Rset
Z1
SET
DESCRIPTION
33
F TANTALUM CAPACITOR
10
F TANTALUM CAPACITOR
0.1
F CERAMIC CAPACITOR
FERRITE BEAD
75
1% METAL FILM RESISTOR
560
1% METAL FILM RESISTOR
1.235V VOLTAGE REFERENCE
VENDOR PART NUMBER
FAIR-RITE 274300111 OR MURATA BL01/02/03
DALE CMF-55C
ANALOG DEVICES AD589JH
Figure 8. ADV7120 Typical Connection Diagram and Component List
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| ADV7120KSTZ30 | 功能描述:IC DAC VIDEO 3-CH 30MHZ 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| ADV7120KSTZ30-REEL | 功能描述:IC DAC VIDEO 3CH 30MHZ 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
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