參數(shù)資料
型號(hào)： ADV601LCJST
廠商： ANALOG DEVICES INC
元件分類(lèi)： 消費(fèi)家電
英文描述： Ultralow Cost Video Codec
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP120
封裝： LQFP-120
文件頁(yè)數(shù)： 34/52頁(yè)
文件大小： 606K
代理商： ADV601LCJST
ADV601
–34–
REV. 0
The Bt819A has a horizontal scaling function that is used to
implement the decimation from the 8xFsc rate to the required
number of pixels per scan line (Pdesired). The value that must
be programmed is HSCALE.
HSCALE = ((910/Pdesired) – 1)
×
4096 {for NTSC}
HSCALE = ((1135/Pdesired) – 1)
×
4096 {for PAL}
Note that the circuit in Figure 17 has not been built or tested.
VCLKO
RDEN
Bt819A
VDATA (15:0)
CLKIN
XTO & XT1
VCLKO
CREF
VDATA (9:2,19:12)
ADV601
8xFSC
VCLK0
FIELD
HSYNC
VSYNC
ACTIVE
VCLK
VCLK
DVALID
(API MODE B)
(PHILIPS & SLAVE MODE)
FIELD
Figure 17. ADV601 and Bt819A Example Interfacing Block
Diagram
Using the Philips SAA7110 or SAA 7111 Video Decoder
The SAA7110 can only be used with Square Pixel sample rates.
Note that the circuit in Figure 18 has not been built or tested.
XTAL
(PHILIPS & SLAVE MODE)
CREF
VS
HREF
ODD
SAA7110
Y(0:7),UV(0:7)
LLC
XTAL
VCLK
CREF
VSYNC
HSYNC
VDATA (2:9,12:19)
FIELD
ADV601
Figure 18. ADV601 and SAA7110 Example Interfacing
Block Diagram
The SAA7111 example circuit, which appears in Figure 19, is
used in this configuration on the ADV601 Video Lab demon-
stration board.
XTAL
(CCIR-656 MODE)
CREF
SAA7111
Y(0:7),UV(0:7)
LLC
XTAL
VCLK
CREF
VDATA (2:9,12:19)
ADV601
Figure 19. ADV601 and SAA7111 Example Interfacing
Block Diagram
Using the Analog Devices ADV7175 Video Encoder
Because the ADV7175 has a CCIR-656 interface, it connects
directly with the ADV601 without “glue” logic. Note that the
ADV7175 can only be used at CCIR-601 sampling rates.
The ADV7175 example circuit, which appears in Figure 20, is
used in this configuration on the ADV601 Video Lab demon-
stration board.
(MODE 0 & SLAVE MODE)
(CCIR-656 MODE)
XTAL
10k
150
VCLK
XTAL
ADV601
VCLKO
CLOCK
P7–P0
ADV7175
BLANK
ALSB
VDATA (9:2)
Figure 20. ADV601 and ADV7175 Example Interfacing
Block Diagram
Using the Raytheon TMC22173 Video Decoder
Raytheon has a whole family of video parts. Any member of the
family can be used. The user must select the part needed based
on the requirements of the application. Because the Raytheon
part does not include the A/Ds, an external A/D is necessary in
this design (or a pair of A/Ds for Svideo).
The part can be used in CCIR-656 (D1) mode for a zero con-
trol signal interface or can be used with the more traditional
HSYNC, VSYNC and FIELD signals used for a Philips style
interface. Special attention must be paid to the video output
modes in order to get the right data to the right pins (see the
following two diagrams).
Note that the circuits in Figure 21 and Figure 22 have not been
built or tested.
(PHILIPS & SLAVE MODE)
MODE SET TO:
CDEC = 1
YUVT = 0
F422
= 1
LDV
DVSYNC
FID(0)
TMC22153
Y(0:9),U(0:9)
CLOCK
XTAL
DHSYNC
VCLK
CREF
VCLK
HSYNC
VDATA (0:9,10:19)
FIELD
ADV601
VSYNC
VCLKOUT
Figure 21. ADV601 and TMC22153 Example Philips-Like
Mode Interface
MODE SET TO:
CDEC = 1
YUVT
F422
= 1
= X
TMC22153
Y(0:9)
CLOCK
XTAL
VCLK
VCLK
VDATA (0:9)
ADV601
(CCIR656 & SLAVE MODE)
Figure 22. ADV601 and TMC22153 Example CCIR-656
Mode Interface
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參數(shù)描述
ADV601LCJSTRL 制造商:Analog Devices 功能描述:Ultralow Cost Video Codec 120-Pin LQFP T/R
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ADV601LCJSTZRL 功能描述:IC CODEC VIDEO DSP/SRL 120LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類(lèi)型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
ADV601LC-VIDEOPIPE 制造商:Analog Devices 功能描述:TOOLS:DEVELOPMENT BOARDS H/W 制造商:Analog Devices 功能描述:EVALUATION BOARD ((NS))
ADV601XS 制造商:Analog Devices 功能描述:
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