參數(shù)資料
型號(hào): ADV476KP66
廠商: ANALOG DEVICES INC
元件分類: 顯示控制器
英文描述: CMOS Monolithic 256x18 Color Palette RAM-DAC
中文描述: PALETTE-DAC DSPL CTLR, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 2/12頁
文件大?。?/td> 175K
代理商: ADV476KP66
REV. B
–2–
ADV476–SPECIFICATIONS
(V
CC
= +5 V
6
10%, I
REF
= 8.88 mA.
All Specifications T
MN
to T
MAX1
unless otherwse noted.)
Parameter
All Versions
Units
T est Conditions/Comments
ST AT IC PERFORMANCE
Resolution (Each DAC)
Accuracy (Each DAC)
Integral Nonlinearity
Full Scale Error
Blank Level
Offset Error
6
Bits
±
0.5
±
5
±
0.5
±
0.5
LSB max
% max
LSB max
LSB max
Guaranteed Monotonic
Full Scale = 2.15
3
I
REF
3
R
L
, I
REF
= 8.39 mA
BLANK
= Logic Low
BLANK
= Logic High
DIGIT AL INPUT S
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Current (
RD
Input Only)
Input Capacitance, C
IN
2
0.8
±
10
±
100
7
V min
V max
μ
A max
μ
A max
pF typ
V
CC
= 5.5 V, V
IN
= 0.4 V to V
CC
V
CC
= 5.5 V, V
IN
= 0.4 V to V
CC
DIGIT AL OUT PUT S
Output High Voltage, V
OH
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
2.4
0.4
±
50
7
V min
V max
μ
A max
pF typ
I
SOURCE
= 500
μ
A, V
CC
= 4.5 V
I
SINK
= 5.0 mA, V
CC
= 4.5 V
V
CC
= 5.5 V, 0.4 V < V
IN
< V
CC
ANALOG OUT PUT S
Max Output Voltage
Max Output Current
DAC to DAC Matching
2
Analog Output Capacitance
1.5
21
±
2.5
10
V min
mA min
% max
pF typ
IO < 10 mA, IO = 2.15
3
I
REF
VO
1 V
BLANK
= Logic Low
CURRENT REFERENCE
Input Current (I
REF
) Range
Voltage at I
REF
–3/–10
V
CC
–3/V
CC
mA min/mA max
V min/V max
I
REF
= 8.88 mA
POWER SUPPLY
Supply Voltage, V
CC
Supply Current, I
CC
Power Supply Rejection Ratio
4.5/5.5
220
6
V min/V max
mA max
%/V
f
MAX
= 66 MHz IO = 2.15
3
I
REF
, D0–D7 Unloaded
4.5 < V
CC
< 5.5 V, IO = 2.15
3
I
REF
, R
L
= 37.5
,
C
L
= 30 pF, I
REF
= 8.88 mA.
DYNAMIC PERFORMANCE
Clock and Data Feedthrough
3, 4
Glitch Impulse
3, 4
–35
75
dB typ
pV secs typ
NOT ES
1
T emperature range (T
to T
); 0 to +70
°
C.
2
Relative to the midpoint of the distribution of the three DACs measured at full scale.
3
T T L input values are 0 to 3 volts, with input rise/fall times
3 ns, measured between the 10% and 90% points. T iming reference points at 50% for inputs and out-
puts. Analog output load
10 pF, 37.5
. D0–D7 output load
50 pF. See timing notes in Figure 2.
4
Clock and data feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. For this test, the digital inputs have a 1 k
resistor to
ground and are driven by 74HC logic. Glitch impulse includes clock and data feedthrough, –3 dB test bandwidth = 2
3
clock rate.
Specifications subject to change without notice.
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