參數(shù)資料
型號: ADUM1210BRZ-RL7
廠商: ANALOG DEVICES INC
元件分類: 其它接口
英文描述: Dual-Channel Digital Isolator
中文描述: SPECIALTY INTERFACE CIRCUIT, PDSO8
封裝: ROHS COMPLIANT, MS-012AA, SOIC-8
文件頁數(shù): 15/16頁
文件大小: 184K
代理商: ADUM1210BRZ-RL7
ADuM1210
Rev. A | Page 15 of 16
MAGNETIC FIELD FREQUENCY (Hz)
M
1000
100
10
1
0.1
0.01
1k
10k
100M
100k
1M
10M
DISTANCE = 5mm
DISTANCE = 1m
DISTANCE = 100mm
0
Figure 11. Maximum Allowable Current for Various
Current-to-ADuM1210 Spacings
Note that at combinations of strong magnetic fields and high
frequencies, any loops formed by printed circuit board traces
could induce sufficiently large error voltages to trigger the
threshold of succeeding circuitry. Care should be taken in the
layout of such traces to avoid this possibility.
POWER CONSUMPTION
The supply current at a given channel of the ADuM1210
isolator is a function of the supply voltage, the channel’s data
rate, and the channel’s output load.
For each input channel, the supply current is given by
I
DDI
= I
DDI
(
Q
)
I
DDI
= I
DDI
(
D
)
× (2
f – f
r
) +
I
DDI (Q)
f
≤ 0.5
f
r
f > 0.5
f
r
for each output channel, the supply current is given by
I
DDO
= I
DDO
(
Q
)
I
DDO
= (
I
DDO
(
D
)
+ (0.5 × 10
3
) ×
C
L
V
DDO
) × (2
f – f
r
) +
I
DDO
(
Q
)
f
≤ 0.5
f
r
f
> 0.5
f
r
where:
I
DDI (D)
,
I
DDO (D)
are the input and output dynamic supply currents
per channel (mA/Mbps).
C
L
is the output load capacitance (pF).
V
DDO
is the output supply voltage (V).
f
is the input logic signal frequency (MHz, half of the input data
rate, NRZ signaling).
f
r
is the input stage refresh rate (Mbps).
I
DDI (Q)
,
I
DDO (Q)
are the specified input and output quiescent
supply currents (mA).
To calculate the total I
DD1
and I
DD2
supply current, the supply
currents for each input and output channel corresponding to
I
DD1
and I
DD2
are calculated and totaled. Figure 4 and Figure 5
provide per-channel supply currents as a function of data rate
for an unloaded output condition. Figure 6 provides per-
channel supply current as a function of data rate for a 15 pF
output condition. Figure 7 and Figure 8 provide total I
DD1
and
I
DD2
supply current as a function of data rate.
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