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參數(shù)資料
| 型號(hào)： | ADUC844BS62-3 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MicroConverter, Dual 16-Bit/24-Bit ADCs with Embedded 62kB FLASH MCU |
| 中文描述： | 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, PQFP52 |
| 封裝： | 14 X 14 MM, PLASTIC, MQFP-52 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 674K |
| 代理商： | ADUC844BS62-3 |
ADuC844
REV. PrB
-13-
PRELIMINARY TECHNICAL DATA
MEMORY7 ORGANISATION
The ADuC844 contains 4 different memory blocks namely:
- 62kBytes of On-Chip Flash/EE Program Memory
- 4kBytes of On-Chip Flash/EE Data Memory
- 256 Bytes of General Purpose RAM
- 2kBytes of Internal XRAM
(1) Flash/EE Program Memory
The ADuC844 provides 62kBytes of Flash/EE program memory to
run user code. The user can choose to run code from this internal
memory or run code from an external program memory.
If the user applies power or resets the device while the
EA
pin is
pulled low externally, the part will execute code from the external
program space, otherwise if
EA
is pulled high externally the part
defaults to code execution from its internal 62kBytes of Flash/EE
program memory. The ADuC844 does not support the rollover from
F7FFh in internal code space to F800h in external code space. Instead
the 2048 bytes between F800h and FFFFh will appear as NOP
instructions to user code.
Permanently embedded firmware allows code to be serially
downloaded to the 62kBytes of internal code space via the UART
serial port while the device is in-circuit. No external hardware is
required.
56kBytes of the program memory can be repogrammed during
runtime hence the code space can be upgraded in the field using a
user defined protocol or it can be used as a data memory. This will be
discussed in more detail in the Flash/EE Memory section of the
datasheet.
(2) Flash/EE Data Memory
4kBytes of Flash/EE Data Memory are available to the user and can
be accessed indirectly via a group of registers mapped into the
Special Function Register (SFR) area. Access to the Flash/EE Data
memory is discussed in detail later as part of the Flash/EE memory
section in this data sheet.
(3) General Purpose RAM
The general purpose RAM is divided into two seperate memories,
namely the upper and the lower 128 bytes of RAM. The lower 128
bytes of RAM can be accessed through direct or indirect addressing
while the upper 128 bytes of RAM can only be accessed through
indirect addressing as it shares the same address space as the SFR
space which can only be accessed through direct addressing.
The lower 128 bytes of internal data memory are mapped as shown in
Figure 2. The lowest 32 bytes are grouped into four banks of eight
registers addressed as R0 through R7. The next 16 bytes (128 bits),
locations 20Hex through 2FHex above the register banks, form a
block of directly addressable bit locations at bit addresses 00H
through 7FH. The stack can be located anywhere in the internal
memory address space, and the stack depth can be expanded up to
2048 bytes.
Reset initializes the stack pointer to location 07 hex. Any call or push
pre-increments the SP before loading the stack. Hence loading the
stack starts from locations 08 hex which is also the first register (R0)
of register bank 1. Thus, if one is going to use more than one register
bank, the stack pointer should be initialized to an area of RAM not
used for data storage.
BIT-ADDRESSABLE
(BIT ADDRESSES)
FOUR BANKS OF EIGHT
REGISTERS
R0 R7
BANKS
SELECTED
VIA
BITS IN PSW
11
10
01
00
07H
0FH
17H
1FH
2FH
7FH
00H
08H
10H
18H
20H
RESET VALUE OF
STACK POINTER
30H
GENERAL-PURPOSE
AREA
Figure 2. Lower 128 Bytes of Internal Data Memory
(4) Internal XRAM
The ADuC844 contains 2kBytes of on-chip extended data memory.
This memory although on-chip is accessed via the MOVX
instruction. The 2kBytes of internal XRAM are mapped into the
bottom 2kBytes of the external address space if the CFG844.0 bit is
set, otherwise access to the external data memory will occur just like
a standard 8051.
Even with the CFG844.0 bit set access to the external XRAM will
occur once the 24 bit DPTR is greater than 0007FFH.
EXTERNAL
DATA
MEMORY
SPACE
(24-BIT
ADDRESS
SPACE)
000000H
FFFFFFH
CFG845.0=0
EXTERNAL
DATA
MEMORY
SPACE
(24-BIT
ADDRESS
SPACE)
000000H
FFFFFFH
CFG845.0=1
0007FFH
000800H
2 KBYTES
ON-CHIP
XRAM
Figure 3: Internal and External XRAM
When accessing the internal XRAM the P0, P2 port pins as well as
the RD and WR strobes will not be output as per a standard 8051
MOVX instruction. This allows the user to use these port pins as
standard I/O.
The upper 1792 bytes of the internal XRAM can be configured to be
used as an extended 11-bit stack pointer.
By default the stack will operate exactly like an 8052 in that it will
rollover from FFh to 00h in the general purpose RAM. On the
ADuC844 however it is possible (by setting CFG844.7) to enable the
11-bit extended stack pointer. In this case the stack will rollover from
FFh in RAM to 0100h in XRAM.
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| ADUC844BCP62-3 | MicroConverter, Dual 16-Bit/24-Bit ADCs with Embedded 62kB FLASH MCU |
| ADUC844BCP62-5 | MicroConverter, Dual 16-Bit/24-Bit ADCs with Embedded 62kB FLASH MCU |
| ADUC844BCP32-3 | MicroConverter, Dual 16-Bit/24-Bit ADCs with Embedded 62kB FLASH MCU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC844BS62-5 | 制造商:Analog Devices 功能描述:MICROCONVERTER, SINGLE CYCLE FLASH MCU 24BIT +16BIT SIGMA DE - Trays |
| ADUC845 | 制造商:AD 制造商全稱:Analog Devices 功能描述:MicroConverter Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| ADUC845_12 | 制造商:AD 制造商全稱:Analog Devices 功能描述:MicroConverter?? Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU |
| ADUC845BCP32-3 | 制造商:Analog Devices 功能描述:10 CHANNEL 24 BIT DUAL ADC + FAST 8BIT UP - Trays |
| ADUC845BCP32-5 | 制造商:Analog Devices 功能描述:10 CHANNEL 24 BIT DUAL ADC + FAST 8BIT UP - Trays |
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