- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374039 > ADUC843BCP32-3 (ANALOG DEVICES INC) MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU PDF資料下載
參數(shù)資料
| 型號： | ADUC843BCP32-3 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| 中文描述： | 8-BIT, FLASH, 8.38 MHz, MICROCONTROLLER, QCC56 |
| 封裝： | 8 X 8 MM, LEAD FRAME, MO-220VLLD2, CSP-56 |
| 文件頁數(shù)： | 57/88頁 |
| 文件大?。?/td> | 903K |
| 代理商： | ADUC843BCP32-3 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁當前第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
ADuC841/ADuC842/ADuC843
8052 COMPATIBLE ON-CHIP PERIPHERALS
This section gives a brief overview of the various secondary
peripheral circuits that are also available to the user on-chip.
These remaining functions are mostly 8052 compatible (with a
few additional features) and are controlled via standard 8052
SFR bit definitions.
Parallel I/O
The ADuC841/ADuC842/ADuC843 use four input/output
ports to exchange data with external devices. In addition to
performing general-purpose I/O, some ports are capable of
external memory operations while others are multiplexed with
alternate functions for the peripheral features on the device. In
general, when a peripheral is enabled, that pin may not be used
as a general-purpose I/O pin.
Port 0
Port 0 is an 8-bit open-drain bidirectional I/O port that is
directly controlled via the Port 0 SFR. Port 0 is also the
multiplexed low order address and data bus during accesses to
external program or data memory.
Rev. 0 | Page 57 of 88
Figure 57 shows a typical bit latch and I/O buffer for a Port 0
port pin. The bit latch (one bit in the port’s SFR) is represented
as a Type D flip-flop, which clocks in a value from the internal
bus in response to a write to latch signal from the CPU. The Q
output of the flip-flop is placed on the internal bus in response
to a read latch signal from the CPU. The level of the port pin
itself is placed on the internal bus in response to a read pin
signal from the CPU. Some instructions that read a port activate
the read latch signal, and others activate the read pin signal. See
the Read-Modify-Write Instructions section for details.
CONTROL
READ
LATCH
INTERNAL
BUS
WRITE
TO LATCH
READ
PIN
D
CL
LATCH
Q
Q
DV
DD
ADDR/DATA
P0.x
PIN
0
Figure 57. Port 0 Bit Latch and I/O Buffer
As shown in Figure 57, the output drivers of Port 0 pins are
switchable to an internal ADDR and ADDR/DATA bus by an
internal control signal for use in external memory accesses.
During external memory accesses, the P0 SFR has 1s written to
it, i.e., all of its bit latches become 1. When accessing external
memory, the control signal in Figure 57 goes high, enabling
push-pull operation of the output pin from the internal address
or data bus (ADDR/DATA line). Therefore, no external pull-ups
are required on Port 0 for it to access external memory.
In general-purpose I/O port mode, Port 0 pins that have 1s writ-
ten to them via the Port 0 SFR are configured as open-drain and
will therefore float. In this state, Port 0 pins can be used as high
impedance inputs. This is represented in Figure 57 by the NAND
gate whose output remains high as long as the control signal is
low, thereby disabling the top FET. External pull-up resistors are
therefore required when Port 0 pins are used as general-purpose
outputs. Port 0 pins with 0s written to them drive a logic low
output voltage (V
OL
) and are capable of sinking 1.6 mA.
Port 1
Port 1 is also an 8-bit port directly controlled via the P1 SFR.
Port 1 digital output capability is not supported on this device.
Port 1 pins can be configured as digital inputs or analog inputs.
By (power-on) default, these pins are configured as analog
inputs, i.e., 1 written in the corresponding Port 1 register bit. To
configure any of these pins as digital inputs, the user should
write a 0 to these port bits to configure the corresponding pin as
a high impedance digital input. These pins also have various
secondary functions as described in Table 25.
Table 25. Port 1 Alternate Pin Functions
Pin No.
Alternate Function
P1.0
T2 (Timer/Counter 2 External Input)
P1.1
T2EX (Timer/Counter 2 Capture/Reload Trigger)
P1.5
SS (Slave Select for the SPI Interface)
READ
LATCH
INTERNAL
BUS
WRITE
TO LATCH
READ
PIN
D
CL
LATCH
Q
Q
P1.x
PIN
TO ADC
0
Figure 58. Port 1 Bit Latch and I/O Buffer
Port 2
Port 2 is a bidirectional port with internal pull-up resistors
directly controlled via the P2 SFR. Port 2 also emits the high-
order address bytes during fetches from external program
memory, and middle and high order address bytes during
accesses to the 24-bit external data memory space.
As shown in Figure 59, the output drivers of Port 2 are switch-
able to an internal ADDR and ADDR/DATA bus by an internal
control signal for use in external memory accesses (as for
Port 0). In external memory addressing mode (CONTROL = 1),
the port pins feature push-pull operation controlled by the
internal address bus (ADDR line). However, unlike the P0 SFR
during external memory accesses, the P2 SFR remains unchanged.
相關PDF資料 |
PDF描述 |
|---|---|
| ADUC842BCP32-5 | MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| ADUC843BCP32-5 | MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| ADUC842BCP8-3 | MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| ADUC843BCP8-3 | MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| ADUC842BCP8-5 | MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC843BCP32-5 | 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 62KB Flash 5V 56-Pin LFCSP EP |
| ADUC843BCP32Z-5 | 功能描述:IC ADC 12BIT W/FLASH MCU 56LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標準包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設備:欠壓檢測/復位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND |
| ADUC843BCP62-3 | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 3V 56-Pin LFCSP EP |
| ADUC843BCP62-5 | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 5V 56-Pin LFCSP EP |
| ADUC843BCP62Z-5 | 功能描述:IC MCU FLASH 12BIT ADC 56LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標準包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設備:欠壓檢測/復位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND |
發(fā)布緊急采購，3分鐘左右您將得到回復。