參數(shù)資料
型號: ADUC842BCP
廠商: ANALOG DEVICES INC
元件分類: 微控制器/微處理器
英文描述: 12- Bit ADCs and DACs with Embedded Hi-Speed 62KB FLASH MCU
中文描述: 8-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, QCC56
封裝: 8 X 8 MM, CSP-56
文件頁數(shù): 2/18頁
文件大?。?/td> 217K
代理商: ADUC842BCP
REV. PrB
–2–
ADuC842–SPECIFICATIONS
1
to 5.5V. V
REF
= 2.5 V Internal Reference, Fcore = 16.777 MHz, All specifications T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
Parameter
V
DD
= 5 V
V
DD
= 3 V
Unit
T est Conditions/Comments
AD C C H ANNE L SPE C IF IC AT IONS
D C AC C URAC Y
2,3
Resolution
Integral Nonlinearity
f
SAMPL E
= 147 kHz,
12
± 1
±0.3
±0.9
±0.25
±1.5
+1.5/-0.9
1
12
± 1
±0.3
±0.9
±0.25
±1.5
+1.5/-0.9
1
Bits
L SB max
L SB typ
L SB max
L SB typ
L SB max
L SB max
L SB typ
2.5V Internal Reference
D ifferential Nonlinearity
2.5V Internal Reference
Integral Nonlinearity
9
Differential Nonlinearity
9
C ode Distrbution
CALIBRAT ED ENDPOINT ERRORS
4,5
Offset Error
Offset Error Match
Gain Error
Gain Error Match
1V External Reference
1V External Reference
ADC Input is a DC Voltage
± 2
± 1
± 2
–85
± 3
± 1
± 3
–85
L SB max
L SB typ
L SB max
dB typ
D Y NAM IC PE RF ORM ANC E
f
IN
= 10 kHz Sine Wave
f
SAMPLE
= 147 kHz
Signal-to-Noise Ratio (SNR)
6
T otal Harmonic Distortion (T HD)
Peak Harmonic or Spurious Noise
C hannel-to-C hannel C rosstalk
7
71
–85
–85
–80
71
–85
–85
–80
dB typ
dB typ
dB typ
dB typ
ANAL OG INPUT
Input Voltage Ranges
L eakage C urrent
Input C apacitance
T E M PE RAT URE SE NSOR
8
Voltage Output at 25°C
Voltage T C
Accuracy
Accuracy
0 to V
REF
± 1
32
0 to V
REF
± 1
32
Volts
μA max
pF typ
650
–2.0
± 3
±1.5
650
–2.0
± 3
±1.5
mV typ
mV/°C typ
°C typ
°C typ
Internal 2.5V V
REF
External 2.5V V
REF
DAC Load to AGND
R
L
= 10k
,
C
L
= 100 pF
D AC C H ANNE L SPE C IF IC AT IONS
Internal Buffer Enabled
D C AC C URAC Y
10
Resolution
Relative Accuracy
Differential Nonlinearity
11
12
± 3
-1
12
± 3
-1
±1/2
±50
± 1
± 1
0.5
Bits
L SB typ
L SB max
±1/2
mV max
% max
% typ
% typ
Guaranteed 12-Bit Monotonic
L SB typ
V
REF
Range
AV
DD
Range
VREF Range
% of Full-Scale on DAC1
Offset Error
Gain Error
±50
± 1
± 1
0.5
Gain Error Mismatch
ANAL OG OU T PU T S
Voltage Range_0
Voltage Range_1
Output Impedance
I
SINK
D AC AC C HARAC T ERIST IC S
Voltage Output Settling T ime
0 to V
REF
0 to V
DD
0.5
50
0 to V
REF
0 to V
DD
0.5
50
V typ
V typ
typ
μA typ
DAC V
REF
= 2.5V
DAC V
REF
= V
DD
15
15
μs typ
Full-Scale Settling T ime to
Within 1/2 LSB of Final Value
1 LSB Change at Major Carry
Digital-to-Analog Glitch Energy
10
10
nV sec typ
(AV
DD
= DV
DD
= 2.7V to 3.3V or 4.5V
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