參數(shù)資料
型號(hào)： ADUC842BCP32-3
廠商： ANALOG DEVICES INC
元件分類： 微控制器/微處理器
英文描述： MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU
中文描述： 8-BIT, FLASH, 8.38 MHz, MICROCONTROLLER, QCC56
封裝： 8 X 8 MM, LEAD FRAME, MO-220VLLD2, CSP-56
文件頁數(shù)： 39/88頁
文件大小： 903K
代理商： ADUC842BCP32-3
ADuC841/ADuC842/ADuC843
Using the DAC
The on-chip DAC architecture consists of a resistor string DAC
followed by an output buffer amplifier, the functional equivalent
of which is illustrated in Figure 42. Details of the actual DAC
architecture can be found in U.S. Patent Number 5969657
(www.uspto.gov). Features of this architecture include inherent
guaranteed monotonicity and excellent differential linearity.
Rev. 0 | Page 39 of 88
OUTPUT
BUFFER
HIGH Z
DISABLE
(FROM MCU)
DAC0
R
R
R
R
R
ADuC841/ADuC842
AV
DD
V
REF
0
Figure 42. Resistor String DAC Functional Equivalent
As shown in Figure 42, the reference source for each DAC is
user selectable in software. It can be either AV
DD
or V
REF
. In
0 V-to-AV
DD
mode, the DAC output transfer function spans
from 0 V to the voltage at the AV
DD
pin. In 0 V-to-V
REF
mode,
the DAC output transfer function spans from 0 V to the internal
V
REF
or, if an external reference is applied, the voltage at the C
REF
pin. The DAC output buffer amplifier features a true rail-to-rail
output stage implementation. This means that unloaded, each
output is capable of swinging to within less than 100 mV of
both AVDD and ground. Moreover, the DAC’s linearity specifica-
tion (when driving a 10 k resistive load to ground) is guaranteed
through the full transfer function except Codes 0 to 100, and, in
0 V-to-AVDD mode only, Codes 3995 to 4095. Linearity degrada-
tion near ground and V
DD
is caused by saturation of the output
amplifier, and a general representation of its effects (neglecting
offset and gain error) is illustrated in Figure 43. The dotted line
in Figure 43 indicates the ideal transfer function, and the solid
line represents what the transfer function might look like with
endpoint nonlinearities due to saturation of the output amplifier.
Note that Figure 43 represents a transfer function in 0 V-to-V
DD
mode only. In 0 V-to-V
REF
mode (with V
REF
< V
DD
), the lower
nonlinearity would be similar, but the upper portion of the
transfer function would follow the ideal line right to the end
(V
REF
in this case, not V
DD
), showing no signs of endpoint
linearity errors.
V
DD
V
DD
–50mV
V
DD
–100mV
100mV
50mV
0mV
000H
FFFH
0
Figure 43. Endpoint Nonlinearities Due to Amplifier Saturation
SOURCE/SINK CURRENT (mA)
5
0
5
10
15
O
4
3
2
1
0
DAC LOADED WITH 0000H
DAC LOADED WITH 0FFFH
0
Figure 44. Source and Sink Current Capability with V
REF
= V
DD
= 5 V
SOURCE/SINK CURRENT (mA)
4
0
5
10
15
O
3
1
0
DAC LOADED WITH 0000H
DAC LOADED WITH 0FFFH
0
Figure 45. Source and Sink Current Capability with V
REF
= V
DD
= 3 V
相關(guān)PDF資料
PDF描述
ADUC843BCP32-3 MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU
ADUC842BCP32-5 MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU
ADUC843BCP32-5 MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU
ADUC842BCP8-3 MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU
ADUC843BCP8-3 MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADUC842BCP32-5 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 62KB Flash 5V 56-Pin LFCSP EP
ADUC842BCP62-3 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 3V 56-Pin LFCSP EP
ADUC842BCP62-3U 制造商:Analog Devices 功能描述:MICROCONVERTER 1-CYCLE VERSION ADUC833 - Trays
ADUC842BCP62-3-U2 制造商:Analog Devices 功能描述:MICROCONVERTER 1-CYCLE VERSION ADUC834 - Trays
ADUC842BCP62-5 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
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