參數(shù)資料
型號(hào)： ADUC814ARU-REEL7
廠商： ANALOG DEVICES INC
元件分類： 微控制器/微處理器
英文描述： Circular Connector; MIL SPEC:MIL-DTL-38999 Series I; Body Material:Metal; Series:LJT; No. of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Body Style:Straight RoHS Compliant: No
中文描述： 8-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PDSO28
封裝： 4.40 X 9.70 MM, MO-153AE, TSSOP-28
文件頁數(shù)： 20/72頁
文件大?。?/td> 846K
代理商： ADUC814ARU-REEL7
ADuC814
SPECIAL FUNCTION REGISTERS
All registers, except the program counter and the four general-
purpose register banks, reside in the SFR area. The SFR registers
include control, configuration, and data registers that provide an
interface between the CPU and all on-chip peripherals.
Rev. A | Page 20 of 72
Figure 22 shows a full SFR memory map and SFR contents on
RESET; NOT USED indicates unoccupied SFR locations.
Unoccupied locations in the SFR address space are not
implemented, i.e., no register exists at this location. If an
unoccupied location is read, an unspecified value is returned.
SFR locations reserved for future use are shaded (RESERVED)
and should not be accessed by the user software.
RESERVED
RESERVED
NOT USED
RESERVED
RESERVED
RESERVED
RESERVED RESERVED RESERVED RESERVED
RESERVED
NOT USED
NOT USED
NOT USED
NOT USED
RESERVED
SPICON
1
F8H
04H
DAC0L
F9H
00H
DAC0H
FAH
00H
DAC1L
FBH
00H
DAC1H
FCH
00H
DACCON
FDH
04H
RESERVED
B
1
F0H
00H
ADCOFSL
F1H
00H
ADCOFSH
F2H
20H
ADCGAINL
F3H
00H
ADCGAINH
F4H
00H
ADCCON3
F5H
00H
RESERVED
DCON
1
E8H
00H
RESERVED
ACC
1
E0H
ADCCON2
1
00H
RESERVED
D8H
00H
ADCDATAL
D9H
00H
ADCDATAH
DAH
00H
RESERVED
PSW
1
D0H
00H
RESERVED
T2CON
1
C8H
00H
RCAP2L
CAH
00H
RCAP2H
CBH
00H
TL2
CCH
00H
TH2
CDH
00H
RESERVED
WDCON
1
C0H
10H
CHIPID
C2H
0XH
IP
1
B8H
00H
ECON
B9H
00H
EDATA1
BCH
00H
ETIM2
BBH
00H
ETIM1
BAH
00H
EDATA2
BDH
00H
IE
1
A8H
00H
IEIP2
A9H
A0H
SCON
1
98H
00H
I2CDAT
9AH
00H
I2CADD
9BH
55H
SBUF
99H
00H
NOT USED
NOT USED
P1
1,2
90H
FFH
NOT USED
TCON
1
88H
00H
TMOD
89H
00H
TL0
8AH
00H
TL1
8BH
00H
TH0
8CH
00H
TH1
8DH
00H
SP
81H
07H
DPL
82H
00H
DPH
83H
00H
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
NOT USED
P3
1
B0H
FFH
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
SPIDAT
F7H
00H
ADCCON1
EFH
00H
RESERVED
PSMCON
DFH
DEH
EDARL
C6H
00H
EDATA3
BEH
00H
EDATA4
BFH
00H
NOT USED
PCON
87H
00H
ISPI
FFH
0
WCOL
FEH
0
SPE
FDH
0
SPIM
FCH
0
CPOL
FBH
0
CPHA
FAH
SPR1
F9H
0
SPR0
5
F8H
0
BITS
F7H
0 F6H
0 F5H
0 F4H
0 F3H
0 F2H
F1H
0 F0H
0
BITS
D1
EFH
0
EEH
0
D0
EDH
0 ECH
0 EBH
0 EAH
E9H
0 E8H
0
BITS
E7H
0 E6H
0 E5H
0 E4H
0 E3H
0 E2H
E1H
0 E0H
0
BITS
ADCI
DFH
0
ADCSPI
DEH
0
CCONV
DDH
0
SCONV
DCH
0
CS3
DBH
0
CS2
DAH
CS1
D9H
0
CS0
D8H
0
BITS
CY
D7H
0
AC
D6H
0
F0
D5H
0
RS1
D4H
0
RS0
D3H
0
OV
D2H
FI
D1H
0
P
D0H
0
BITS
TF2
CFH
0
EXF2
CEH
0
RCLK
CDH
0
TCLK
CCH
0
EXEN2
CBH
0
TR2
CAH
CNT2
C9H
0
CAP2
C8H
0
BITS
PRE3
C7H
0
PRE2
C6H
0
PRE1
C5H
0 C4H
1
WDIR
C3H
0
WDS
C2H
WD
C1H
0
WDWR
C0H
0
BITS
PSI
BFH
0
PADC
BEH
0
PT2
BDH
0
PS
BCH
0
PT1
BBH
0
PX1
BAH
PT0
B9H
0
PX0
B8H
0
BITS
RD
B7H
1
WR
B6H
1
T1
B5H
1
T0
B4H
1
INT1
1
INT0
B2H
TxD
B1H
1
RxD
B0H
1
BITS
EA
AFH
EADC
AEH
ET2
ADH
ES
ACH
0
ET1
ABH
0
EX1
AAH
ET0
A9H
0
EX0
A8H
0
BITS
SM0
9FH
0
SM1
9EH
0
SM2
9DH
0
REN
9CH
0
TB8
9BH
0
RB8
9AH
TI
99H
0
RI
98H
0
BITS
97H
1 96H
1 95H
1 94H
1 93H
1 92H
T2EX
91H
1
T2
90H
1
BITS
TF1
8FH
0
TR1
8EH
0
TF0
8DH
0
TR0
8CH
0
IE1
8BH
0
IT1
8AH
IE0
89H
0
IT0
88H
0
BITS
1
0
1
0
IE0
89H
0
IT0
88H
0
TCON
88H
00H
MNEMONIC
SFR ADDRESS
DEFAULT VALUE
MNEMONIC
DEFAULT VALUE
SFR ADDRESS
THESE BITS ARE CONTAINED IN THIS BYTE.
SFR MAP KEY:
1
RESERVED
RESERVED
RESERVED
0
0
0
0
0
0
0
0
0
0
0
0
TIMECON HTHSEC
SEC
MIN
HOUR
INTVAL
A1H
A2H
A3H
A4H
CFG814
A5H
A6H
00H
00H
00H
00H
00H
00H
RESERVED
RESERVED RESERVED RESERVED RESERVED
RESERVED RESERVED
9CH
04H
RESERVED
RESERVED
D1EN
D0EN
RESERVED
PRE0
PLLCON
D7H
53H
0
Figure 22. Special Function Register Locations and Reset Values
Note the following about SFRs:
SFRs whose address ends in 0H or 8H are bit addressable.
Only P1.0 and P1.1 can operate as digital I/O pins. P1.2–P1.7 can be configured as analog inputs (ADC inputs) or as digital inputs.
The CHIPID SFR contains the silicon revision ID byte and may change for future silicon revisions.
These registers are reconfigured at power-on with factory calculated calibration coefficients that can be overwritten by user code. See
the calibration options in ADCCON3 SFR.
When the SPIM bit in the SPICON SFR is cleared, the SPR0 bit reflects the level on the SS pin (Pin 22).
相關(guān)PDF資料
PDF描述
ADUC814BRU Circular Connector; MIL SPEC:MIL-DTL-38999 Series I; Body Material:Metal; Series:LJT; No. of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Body Style:Straight RoHS Compliant: No
ADUC814BRU-REEL Circular Connector; No. of Contacts:56; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Pin; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:25-4
ADUC814BRU-REEL7 Circular Connector; No. of Contacts:61; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Pin; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:25-61
ADUC814 MicroConverter, Small Package 12-Bit ADC with Embedded Flash MCU
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參數(shù)描述
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