參數(shù)資料
型號(hào)： ADUC7023BCPZ62I-R7
廠商： Analog Devices Inc
文件頁數(shù)： 24/96頁
文件大?。?/td> 0K
描述： IC MCU 12BIT 62KB FLASH 32LFCSP
標(biāo)準(zhǔn)包裝： 1,500
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 44MHz
連通性： I²C，SPI
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 12
程序存儲(chǔ)器容量： 64KB（32K x 16）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 2K x 32
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b，D/A 4x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 32-WFQFN 裸露焊盤，CSP
包裝： 帶卷 (TR)
ADuC7023
Data Sheet
| Page 30 of 96
TYPICAL OPERATION
When configured via the ADC control and channel selection
registers, the ADC converts the analog input and provides a
12-bit result in the ADC data register.
The top four bits are the sign bits. The 12-bit result is placed
from Bit 16 to Bit 27 as shown in Figure 22. Note that in fully
differential mode, the result is represented in twos complement
format. In single-ended mode, the result is represented in
straight binary format.
08
67
5-
0
15
SIGN BITS
12-BIT ADC RESULT
31
27
16 15
0
Figure 22. ADC Result Format
The same format is used in DACxDAT, simplifying the software.
Current Consumption
The ADC in standby mode, that is, powered up but not
converting, typically consumes 640 μA. The internal reference
adds 140 μA. During conversion, the extra current is 0.3 μA
multiplied by the sampling frequency (in kHz).
Timing
Figure 23 gives details of the ADC timing. Users control the
ADC clock speed and the number of acquisition clocks in the
ADCCON MMR. By default, the acquisition time is eight
clocks, and the clock divider is two. The number of extra clocks
(such as bit trial or write) is set to 19, which gives a sampling
rate of 774 kSPS. For conversion on the temperature sensor, set
ADCCON = 0x37A3. When using multiple channels including
the temperature sensor, the timing settings revert to the user-
defined settings after reading the temperature sensor channel.
08
675
-016
ADC CLOCK
ACQ
BIT TRIAL
DATA
ADCSTA = 0
ADCSTA = 1
ADC INTERRUPT
WRITE
CONVSTART
ADCBUSY
ADCDAT
Figure 23. ADC Timing
MMR INTERFACE
The ADC is controlled and configured via the eight MMRs
described in this section.
ADCCON Register
Name:
ADCCON
Address:
0xFFFF0500
Default value:
0x0600
Access:
Read/write
Function:
ADCCON is an ADC control register
that allows the programmer to enable the
ADC peripheral, select the mode of
operation of the ADC (either in single-
ended mode or fully differential mode),
and select the conversion type. This MMR
is described in Table 24.
Table 24. ADCCON MMR Bit Designations
Bit
Value
Description
15 to 14
Reserved.
13
Temperature sensor conversion enable. Set to 1 for temperature sensor conversions and single
software conversions. Set to 0 for normal ADC conversions.
12 to 10
ADC clock speed.
000
fADC/1. This divider is provided to obtain 1 MSPS ADC with an external clock <41.78 MHz.
001
fADC/2 (default value).
010
fADC/4.
011
fADC/8.
100
fADC/16.
101
fADC/32.
9 to 8
ADC acquisition time.
00
2 clocks.
01
4 clocks.
10
8 clocks (default value).
11
16 clocks.
Rev. E
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