參數(shù)資料
型號(hào): ADT7482ARMZ-REEL
廠商: ON Semiconductor
文件頁(yè)數(shù): 11/20頁(yè)
文件大小: 282K
描述: IC SENSOR TEMP 2CH ALARM 10MSOP
產(chǎn)品變化通告: MFG CHG Notification ADI to ON Semi
標(biāo)準(zhǔn)包裝: 3,000
功能: 溫度監(jiān)控系統(tǒng)(傳感器)
傳感器類型: 內(nèi)部和外部
感應(yīng)溫度: -40°C ~ 125°C,外部傳感器
精確度: ±2.5°C(最小值)
拓?fù)洌?/td> ADC,比較器,多路復(fù)用器,寄存器庫(kù)
輸出類型: SMBus?
輸出警報(bào):
輸出風(fēng)扇:
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 帶卷 (TR)
ADT7482
http://onsemi.com
11
Status Registers
The   status   registers   are   read-only   registers   at
Addresses 0x02   (Status   Register 1)   and   Address 0x23
(Status Register 2). They contain status information for the
ADT7482.
Table 12. STATUS REGISTER 1 BIT ASSIGNMENTS
Bit
Mnemonic
Function
ALERT
7
BUSY
1 when ADC Converting
No
6
LHIGH
(Note 1)
1 when Local High
Temperature Limit Tripped
Yes
5
LLOW
(Note 1)
1 when Local Low
Temperature Limit Tripped
Yes
4
R1HIGH
(Note 1)
1 when Remote 1 High
Temperature Limit Tripped
Yes
3
R1LOW
(Note 1)
1 when Remote 1 Low
Temperature Limit Tripped
Yes
2
D1 OPEN
(Note 1)
1 when Remote 1 Sensor
Open Circuit
Yes
1
R1THRM1
1 when Remote 1 THERM
Limit Tripped
No
0
LTHRM1
1 when Local THERM
 Limit
Tripped
No
1.  These flags stay high until the status register is read, or they are
reset by POR.
Table 13. STATUS REGISTER 2 BIT ASSIGNMENTS
Bit
Mnemonic
Function
ALERT
7
Res
Reserved for Future Use
No
6
Res
Reserved for Future Use
No
5
Res
Reserved for Future Use
No
4
R2HIGH
(Note 1)
1 when Remote 2 High
Temperature Limit Tripped
Yes
3
R2LOW
(Note 1)
1 when Remote 2 Low
Temperature Limit Tripped
Yes
2
D2 OPEN
(Note 1)
1 when Remote 2 Sensor
Open Circuit
Yes
1
R2THRM1
1 when Remote 2 THERM
Limit Tripped
No
0
ALERT
1 when ALERT
 Condition
Exists
No
1.  These flags stay high until the status register is read, or they are
reset by POR.
The eight flags that can generate an ALERT
 are NORd
together. When any flags are high, the ALERT
 interrupt
latch is set and the ALERT
 output goes low (provided they
are not masked out).
Reading the Status 1 register clears the 5 flags, (Bit 6
through Bit 2) in Status Register 1, provided the error
conditions that caused the flags to be set have gone away.
Reading the Status 2 Register clears the three flags, (Bit 4
through Bit 2) in Status Register 2, provided the error
conditions that caused the flags to be set have gone away. A
flag bit can only be reset if the corresponding value register
contains an in-limit measurement or if the sensor is good.
The ALERT
 interrupt latch is not reset by reading the
status register. It is reset when the ALERT
 output has been
serviced by the master reading the device address, provided
the error condition has gone away and the status register flag
bits have been reset.
When Flag 1 and/or Flag 0 of Status Register 1 or Flag 1
of Status Register 2 are set, the THERM
 output goes low to
indicate that the temperature measurements are outside the
programmed limits. The THERM
 output does not need to be
reset, unlike the ALERT
 output. Once the measurements are
within the limits, the corresponding status register bits are
reset automatically, and the THERM
 output goes high. To
add hysteresis, program Register 0x21. The THERM
 output
is reset only when the temperature falls below the THERM
limit minus hysteresis.
When Pin 8 is configured as THERM2
, only the high
temperature limits are relevant. If Flag 6 or Flag 4 of Status
Register 1 or Flag 4 of Status Register 2 are set, the
THERM2
 output goes low to indicate that the temperature
measurements are outside the programmed limits. Flag 5
and Flag 3 of Status Register 1 and Flag 3 of Status
Register 2 have no effect on THERM2
. The behavior of
THERM2
 is otherwise the same as THERM
.
Bit 0 of the Status Register 2 is set whenever the
ADT7482 ALERT
  output is asserted low. Read Status
Register 2 to determine if the ADT7482 is responsible for
the ALERT
. This bit is reset when the ALERT
 output is reset.
If the ALERT
 output is masked, then this bit is not set.
Offset Register
Offset errors can be introduced into the remote
temperature measurement by clock noise or by the thermal
diode being located away from the hot spot. To achieve the
specified accuracy on this channel, these offsets must be
removed.
The offset values are stored as 10-bit, twos complement
values.
?SPAN class="pst ADT7482ARMZ-REEL_2296055_3"> The Remote 1 Offset MSBs are stored in Register 0x11
and the LSBs are stored in Register 0x12 (low byte, left
justified). The Remote 2 Offset MSBs are stored in
Register 0x34 and the LSBs are stored in Register 0x35
(low byte, left justified).
?SPAN class="pst ADT7482ARMZ-REEL_2296055_3"> The Remote 2 Offset can be written to or read from the
Remote 1 Offset Registers if Bit 3 of the
Configuration 1 register is set to 1. This bit should be
set to 0 (default) to read the Remote 1 offset values.
Only the upper 2 bits of the LSB registers are used. The
MSB of MSB offset registers is the sign bit. The minimum
offset that can be programmed is 128癈, and the maximum
is +127.75癈. The value in the offset register is added or
subtracted to the measured value of the remote temperature.
The offset register powers up with a default value of 0癈
and has no effect unless a different value is written to it.
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