參數(shù)資料
型號(hào)： ADSP-BF542MBBCZ-5M
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 533 MHz Blackfin Embedded Processor: ADSP-BF542MBBCZ-5M Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
中文描述： 16-BIT, 50 MHz, OTHER DSP, PBGA400
封裝： 17 X 17 MM, ROHS COMPLIANT, CSBGA-400
文件頁(yè)數(shù)： 18/100頁(yè)
文件大?。?/td> 3095K
代理商： ADSP-BF542MBBCZ-5M
Rev. D
|
Page 24 of 100
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May 2011
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
Pin definitions for the ADSP-BF54x processors are listed in
Table 11. In order to maintain maximum function and reduce
package size and ball count, some balls have dual, multiplexed
functions. In cases where ball function is reconfigurable, the
default state is shown in plain text, while the alternate function
is shown in italics.
All pins are three-stated during and immediately after reset,
with the exception of the external memory interface, asynchro-
nous and synchronous memory control, and the buffered XTAL
output pin (CLKBUF). On the external memory interface, the
control and address lines are driven high, with the exception of
CLKOUT, which toggles at the system clock rate. During hiber-
nate, all outputs are three-stated unless otherwise noted in
All I/O pins have their input buffers disabled with the exception
of the pins that need pull-ups or pull-downs, as noted in
It is strongly advised to use the available IBIS models to ensure
that a given board design meets overshoot/undershoot and sig-
nal integrity requirements.
Additionally, adding a parallel termination to CLKOUT may
prove useful in further enhancing signal integrity. Be sure to
verify overshoot/undershoot and signal integrity specifications
on actual hardware.
Port H
GPIO (14 pins)
UART1 (2 pins)
PPI0-1_FS3 (2 pins)
TACI1 (1 pin)
Interrupts (8 pins)
ATAPI_RESET (1 pin)
TMR8 (1 pin)
PPI2_FS3 (1 pin)
HOST_ADDR (1 pin)
TMR9 (1 pin)
Counter Down/Gate
(1 pin)
HOST_ACK (1 pin)
TMR10 (1 pin)
Counter Up/Dir
(1 pin)
MXVR MRX, MTX,
MRXON/GPW
(3 pins)4
DMAR 0–1 (2 pins)
TACI8–10 (3 pins)
TACLK8–10 (3 pins)
HWAITA
AMC Addr 4-9 (6 pins)
Interrupts (6 pins)
Port I
GPIO (16 pins)
Async Addr10–25
(16 pins)
Interrupts (8 pins)
Port J
GPIO (14 pins)
Async CTL and MISC
Interrupts (8 pins)
Interrupts (6 pins)
1 Port connections may be inputs or outputs after power up depending on the model and boot mode chosen.
2 All port connections always power up as inputs for some period of time and require resistive termination to a safe condition if used as outputs in the system.
3 A total of 32 interrupts at once are available from ports C through J, configurable in byte-wide blocks.
4 GPW functionality available when MXVR is not present or unused.
Table 10. Pin Multiplexing
(Continued)
Primary Pin
Function
(Number of
Pins)
1, 2
First Peripheral
Function
Second Peripheral
Function
Third Peripheral
Function
Fourth Peripheral
Function
Interrupt Capability
相關(guān)PDF資料
PDF描述
ADSP-BF542KBCZ-6A 600 MHz Blackfin Embedded Processor: ADSP-BF542KBCZ-6A Temp Range: 0°C to +70°C Package: 400-Ball CSP_BGA BC-400-1
ADSP-BF544BBCZ-4A 400 MHz Blackfin Embedded Processor: ADSP-BF544BBCZ-4A Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
ADSP-BF544BBCZ-5A 533 MHz Blackfin Embedded Processor: ADSP-BF544BBCZ-5A Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
ADSP-BF544MBBCZ-5M 533 MHz Blackfin Embedded Processor: ADSP-BF544MBBCZ-5M Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
ADSP-BF547BBCZ-5A 533 MHz Blackfin Embedded Processor: ADSP-BF547BBCZ-5A Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
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參數(shù)描述
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ADSP-BF544BBCZ-5X 制造商:Analog Devices 功能描述:HIGH PERFORMANCE CONVERGENT MULTIMEDIA BLACKFIN PROCESSOR - Trays
ADSP-BF544MBBCZ-5M 功能描述:IC DSP 16BIT 533MHZ MDDR 400CBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:Blackfin® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤(pán)
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