參數(shù)資料
型號(hào)： ADSP-BF537KBCZ-6AV
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 16/68頁(yè)
文件大小： 0K
描述： IC DSP CTLR 16BIT 182CSPBGA
產(chǎn)品培訓(xùn)模塊： Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
標(biāo)準(zhǔn)包裝： 1
系列： Blackfin®
類(lèi)型： 定點(diǎn)
接口： CAN，SPI，SSP，TWI，UART
時(shí)鐘速率： 600MHz
非易失內(nèi)存： 外部
芯片上RAM： 132kB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.30V
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 182-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 182-CSPBGA（12x12）
包裝： 托盤(pán)
配用： ADZS-BF537-ASKIT-ND - BOARD EVAL SKIT ADSP-BF537
ADZS-BFAUDIO-EZEXT-ND - BOARD EVAL AUDIO BLACKFIN
ADZS-BF537-EZLITE-ND - BOARD EVAL ADSP-BF537
ADZS-BFAV-EZEXT-ND - BOARD DAUGHT ADSP-BF533,37,61KIT
ADZS-BF537-STAMP-ND - SYSTEM DEV FOR ADSP-BF537
Rev. J
|
Page 23 of 68
|
February 2014
SPECIFICATIONS
Note that component specifications are subject to change
without notice.
OPERATING CONDITIONS
Parameter
Conditions
Min
Nominal
Max
Unit
VDDINT
Internal Supply Voltage1
1 The regulator can generate VDDINT at levels of 0.85 V to 1.2 V with –5% to +10% tolerance, 1.25 V with –4% to +10% tolerance, and 1.3 V with –0% to +10% tolerance. The
required VDDINT is a function of speed grade and operating frequency. See Table 10, Table 11, and Table 12 for details.
Nonautomotive 300 MHz, 400 MHz, and 500 MHz speed
grade models
2
0.8
1.2
1.32
V
VDDINT
Internal Supply Voltage1
Nonautomotive 533 MHz speed grade models2
0.8
1.25
1.375
V
VDDINT
Internal Supply Voltage1
Nonautomotive 600 MHz speed grade models2
0.8
1.3
1.43
V
VDDINT
Internal Supply Voltage1
Automotive grade models and +105°C nonautomotive
grade models2
0.95
1.2
1.32
V
VDDEXT
External Supply Voltage
Nonautomotive grade models2
2.25
2.5 or 3.3
3.6
V
VDDEXT
External Supply Voltage
Automotive grade models and +105°C nonautomotive
grade models2
2.7
3.0 or 3.3
3.6
V
VDDRTC
Real-Time Clock Power
Supply Voltage
2.25
3.6
V
VIH
High Level Input Voltage3, 4
3 Bidirectional pins (DATA15–0, PF15–0, PG15–0, PH15–0, TFS0, TSCLK0, RSCLK0, RFS0, MDIO) and input pins (BR, ARDY, DR0PRI, DR0SEC, RTXI, TCK, TDI, TMS,
TRST, CLKIN, RESET, NMI, and BMODE2–0) of the ADSP-BF534/ADSP-BF536/ADSP-BF537 are 3.3 V-tolerant (always accept up to 3.6 V maximum VIH). Voltage
compliance (on outputs, VOH) is limited by the VDDEXT supply voltage.
4 Parameter value applies to all input and bidirectional pins except CLKIN, SDA, and SCL.
VDDEXT = Maximum
2.0
V
VIHCLKIN High Level Input Voltage
5
5 Parameter value applies to CLKIN pin only.
VDDEXT = Maximum
2.2
V
VIH5V
5.0 V Tolerant Pins, High
Level Input Voltage6
6 Applies to pins PJ2/SCL and PJ3/SDA which are 5.0 V tolerant (always accept up to 5.5 V maximum VIH). Voltage compliance (on outputs, VOH) is limited by the VDDEXT supply
voltage.
0.7 × VDDEXT
V
VIH5V
5.0 V Tolerant Pins, High
Level Input Voltage
7
7 Applies to pin PJ4/DR0SEC/CANRX/TACI0 which is 5.0 V tolerant (always accepts up to 5.5 V maximum VIH). Voltage compliance (on outputs, VOH) is limited by the VDDEXT
supply voltage.
VDDEXT = Maximum
2.0
V
VIL
Low Level Input Voltage3, 8
8 Parameter value applies to all input and bidirectional pins except SDA and SCL.
VDDEXT = Minimum
+0.6
V
VIL5V
5.0 V Tolerant Pins, Low
Level Input Voltage
0.3 × VDDEXT V
VIL5V
5.0 V Tolerant Pins, Low
Level Input Voltage
VDDEXT = Minimum
+0.8
V
TJ
Junction Temperature
208-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @
TAMBIENT = –40°C to +105°C
–40
+120
°C
TJ
Junction Temperature
208-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @
TAMBIENT = –40°C to +85°C
–40
+105
°C
TJ
Junction Temperature
208-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @
TAMBIENT = 0°C to +70°C
0+95
°C
TJ
Junction Temperature
182-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @
TAMBIENT = –40°C to +85°C
–40
+105
°C
TJ
Junction Temperature
182-Ball Chip Scale Package Ball Grid Array (CSP_BGA) @
TAMBIENT = 0°C to +70°C
0+100
°C
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