參數資料
型號: ADSP-BF533SBBC500
廠商: ANALOG DEVICES INC
元件分類: 數字信號處理
英文描述: Metal Connector Backshell
中文描述: 16-BIT, 40 MHz, OTHER DSP, PBGA160
封裝: MO-205AE, CSBGA-160
文件頁數: 28/56頁
文件大?。?/td> 671K
代理商: ADSP-BF533SBBC500
Rev. 0
|
Page 28 of 56
|
March 2004
ADSP-BF531/ADSP-BF532/ADSP-BF533
Serial Ports
Table 21
through
Table 26 on Page 29
and
Figure 16 on Page 30
through
Figure 18 on Page 32
describe Serial Port operations.
Table 21. Serial Ports—External Clock
Parameter
Timing Requirements
t
SFSE
t
HFSE
t
SDRE
t
HDRE
t
SCLKEW
t
SCLKE
1
Referenced to sample edge.
Min
Max
Unit
TFS/RFS Setup Before TSCLK/RSCLK
1
TFS/RFS Hold After TSCLK/RSCLK
1
Receive Data Setup Before RSCLK
1
Receive Data Hold After RSCLK
1
TSCLK/RSCLK Width
TSCLK/RSCLK Period
3.0
3.0
3.0
3.0
4.5
15.0
ns
ns
ns
ns
ns
ns
Table 22. Serial Ports—Internal Clock
Parameter
Timing Requirements
t
SFSI
t
HFSI
t
SDRI
t
HDRI
t
SCLKEW
t
SCLKE
1
Referenced to sample edge.
Min
Max
Unit
TFS/RFS Setup Before TSCLK/RSCLK
1
TFS/RFS Hold After TSCLK/RSCLK
1
Receive Data Setup Before RSCLK
1
Receive Data Hold After RSCLK
1
TSCLK/RSCLK Width
TSCLK/RSCLK Period
8.0
–2.0
6.0
0.0
4.5
15.0
ns
ns
ns
ns
ns
ns
Table 23. Serial Ports—External Clock
Parameter
Switching Characteristics
t
DFSE
t
HOFSE
t
DDTE
t
HDTE
1
Referenced to drive edge.
Min
Max
Unit
TFS/RFS Delay After TSCLK/RSCLK (Internally Generated TFS/RFS)
1
TFS/RFS Hold After TSCLK/RSCLK (Internally Generated TFS/RFS)
1
Transmit Data Delay After TSCLK
1
Transmit Data Hold After TSCLK
1
10.0
ns
ns
ns
ns
0.0
10.0
0.0
Table 24. Serial Ports—Internal Clock
Parameter
Switching Characteristics
t
DFS
I
t
HOFS
I
t
DDT
I
t
HDT
I
t
SCLKIW
1
Referenced to drive edge.
Min
Max
Unit
TFS/RFS Delay After TSCLK/RSCLK (Internally Generated TFS/RFS)
1
TFS/RFS Hold After TSCLK/RSCLK (Internally Generated TFS/RFS)
1
Transmit Data Delay After TSCLK
1
Transmit Data Hold After TSCLK
1
TSCLK/RSCLK Width
3.0
ns
ns
ns
ns
ns
1.0
3.0
2.0
4.5
相關PDF資料
PDF描述
ADSP-BF533SBBZ500 Blackfin Embedded Processor
ADSP-BF533SKBC600 Blackfin Embedded Processor
ADSP-BF561SKBCZ600 Blackfin Embedded Symmetric Multi-Processor
ADSP-BF561SKBCZ500 Blackfin Embedded Symmetric Multi-Processor
ADSP-BF561 Synchronous 4-Bit Up/Down Binary Counters With Dual Clock and Clear 16-PDIP 0 to 70
相關代理商/技術參數
參數描述
ADSPBF533SBBC-500 制造商:Analog Devices 功能描述:Dual MAC16-bit500MHz 148KB SRAM
ADSPBF533SBBC500X 制造商:Analog Devices 功能描述:
ADSP-BF533SBBC-500X 制造商:Analog Devices 功能描述:
ADSP-BF533SBBC-5V 功能描述:IC DSP CTLR DUAL 160CSPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP(數字式信號處理器) 系列:Blackfin® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI,以太網,RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA,F(xiàn)CBGA 供應商設備封裝:431-FCPBGA(20x20) 包裝:托盤
ADSP-BF533SBBC-C10 制造商:Analog Devices 功能描述: