參數(shù)資料
型號: ADSP-BF524KBCZ-4C2
廠商: Analog Devices Inc
文件頁數(shù): 33/36頁
文件大小: 0K
描述: IC DSP CTRLR 400MHZ 289CSPBGA
標(biāo)準(zhǔn)包裝: 1
系列: Blackfin®
類型: 定點(diǎn)
接口: DMA,I²C,PPI,SPI,SPORT,UART,USB
時(shí)鐘速率: 400MHz
非易失內(nèi)存: ROM(32 kB)
芯片上RAM: 132kB
電壓 - 輸入/輸出: 1.8V,2.5V,3.3V
電壓 - 核心: 1.30V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 289-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 289-CSPBGA(12x12)
包裝: 托盤
Rev. A
|
Page 6 of 36
|
March 2010
ADSP-BF522C/ADSP-BF523C/ADSP-BF524C/ADSP-BF525C/ADSP-BF526C/ADSP-BF527C
The programmer can simultaneously load the volume control of
both channels by writing to the LRHPBOTH (Register R2, Bit
D8) and RLHPBOTH (Register R3, Bit D8) bits of the left- or
right-channel DAC volume registers.
The maximum output level of the headphone outputs is
1.0 V rms when AVDD and HPVDD = 3.3 V. To suppress audi-
ble pops and clicks, the headphone and line outputs are held at
the VMID dc voltage level when the device is set to standby
mode or when the headphone outputs are muted.
The stereo line outputs of the codec, the LOUT and ROUT pins,
can drive a load impedance of 10 k
Ω and 50 pF. The line output
signal levels are not adjustable at the output mixer, which has a
fixed gain of 0 dB. The maximum output level of the line out-
puts is 1.0 V rms when AVDD = 3.3 V.
DIGITAL AUDIO INTERFACE
The digital audio input can support the following digital audio
communication protocols: right-justified mode, left-justified
mode, I2S mode, and frame sync mode. See Figure 6 on Page 6
The mode selection is performed by writing to the FORMAT
bits of the digital audio interface register (Register R7, Bit D1
and Bit D0). All modes are MSB first and operate with data of 16
to 32 bits.
Figure 6. Left-Justified Audio Input Mode
Figure 7. Right-Justified Audio Input Mode
ADCLRC/
DACLRC
CODEC_BCLK
ADCDAT/
DACDAT
1234
N
X
N
12
LEFT CHANNEL
3
RIGHT CHANNEL
1/
fS
X = DON’T CARE.
ADCLRC/
DACLRC
CODEC_BCLK
ADCDAT/
DACDAT
LEFT CHANNEL
RIGHT CHANNEL
1/
fS
X = DON’T CARE.
XN
X
3
2
1
XXN
4
4321
相關(guān)PDF資料
PDF描述
TAP226M020CRW CAP TANT 22UF 20V 20% RADIAL
EEC18DRXH CONN EDGECARD 36POS DIP .100 SLD
MAX6505UTN005+T IC TEMP SWITCH DL TRIP SOT23-6
EBC08DRTS CONN EDGECARD 16POS DIP .100 SLD
TAP226M020BRW CAP TANT 22UF 20V 20% RADIAL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-BF525 制造商:Analog Devices 功能描述:
ADSP-BF525ABCZ-5 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC ADSP-BF525 Processor 533Mhz Ethernet USB RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
ADSP-BF525ABCZ-6 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC ADSP-BF525 Processor 600Mhz Ethernet USB RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
ADSP-BF525BBCZ-5A 功能描述:IC DSP CTRLR 16B 533MHZ 208BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號處理器) 系列:Blackfin® 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C,McASP,McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA(27x27) 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
ADSP-BF525KBCZ-5 功能描述:IC DSP CTRLR 16B 533MHZ 289BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號處理器) 系列:Blackfin® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI,以太網(wǎng),RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA(20x20) 包裝:托盤