參數(shù)資料
型號(hào)： ADSP-2185NBCA-320
廠商： ANALOG DEVICES INC
元件分類(lèi)： 數(shù)字信號(hào)處理
英文描述： LM2941/LM2941C 1A Low Dropout Adjustable Regulator; Package: TO-263; No of Pins: 5; Qty per Container: 45; Container: Rail
中文描述： 24-BIT, 40 MHz, OTHER DSP, PBGA144
封裝： MO-205AC, BGA-144
文件頁(yè)數(shù)： 2/31頁(yè)
文件大?。?/td> 223K
代理商： ADSP-2185NBCA-320
REV. A
ADSP-2185L
–2–
The ADSP-2185L’s flexible architecture and comprehensive in-
struction set allow the processor to perform multiple operations
in parallel. In one processor cycle the ADSP-2185L can:
Generate the next program address
Fetch the next instruction
Perform one or two data moves
Update one or two data address pointers
Perform a computational operation
This takes place while the processor continues to:
Receive and transmit data through the two serial ports
Receive or transmit data through the internal DMA port
Receive or transmit data through the byte DMA port
Decrement timer
DEVELOPMENT SYSTEM
The ADSP-2100 Family Development Software, a complete set
of tools for software and hardware system development, sup-
ports the ADSP-2185L. The System Builder provides a high
level method for defining the architecture of systems under de-
velopment. The Assembler has an algebraic syntax that is easy
to program and debug. The Linker combines object files into an
executable file. The Simulator provides an interactive instruc-
tion-level simulation with a reconfigurable user interface to dis-
play different portions of the hardware environment.
A PROM Splitter generates PROM programmer compatible
files. The C Compiler, based on the Free Software Foundation’s
GNU C Compiler, generates ADSP-2185L assembly source
code. The source code debugger allows programs to be cor-
rected in the C environment. The Runtime Library includes over
100 ANSI-standard mathematical and DSP-specific functions.
The EZ-KIT Lite is a hardware/software kit offering a complete
development environment for the entire ADSP-21xx family: an
ADSP-218x based evaluation board with PC monitor software
plus Assembler, Linker, Simulator, and PROM Splitter soft-
ware. The ADSP-218x EZ-KIT Lite is a low cost, easy to use
hardware platform on which you can quickly get started with
your DSP software design. The EZ-KIT Lite includes the fol-
lowing features:
33 MHz ADSP-218x
Full 16-bit Stereo Audio I/O with AD1847 SoundPort
Codec
RS-232 Interface to PC with Windows 3.1 Control Software
EZ-ICE
Connector for Emulator Control
DSP Demo Programs
The ADSP-218x EZ-ICE Emulator aids in the hardware debug-
ging of ADSP-2185L system. The emulator consists of hard-
ware, host computer resident software and the target board
connector. The ADSP-2185L integrates on-chip emulation sup-
port with a 14-pin ICE-Port interface. This interface provides a
simpler target board connection requiring fewer mechanical
clearance considerations than other ADSP-2100 Family
EZ-ICEs. The ADSP-2185L device need not be removed from
the target system when using the EZ-ICE, nor are any adapters
needed. Due to the small footprint of the EZ-ICE connector, emu-
lation can be supported in final board designs.
The EZ-ICE performs a full range of functions, including:
In-target operation
Up to 20 breakpoints
Single-step or full-speed operation
Registers and memory values can be examined and altered
PC upload and download functions
Instruction-level emulation of program booting and execution
Complete assembly and disassembly of instructions
C source-level debugging
See “Designing An EZ-ICE-Compatible Target System” in the
ADSP-2100 Family EZ-Tools Manual
(ADSP-2181 sections) as
well as the Designing an EZ-ICE Compatible System section of
this data sheet for the exact specifications of the EZ-ICE target
board connector.
Additional Information
This data sheet provides a general overview of ADSP-2185L
functionality. For additional information on the architecture and
instruction set of the processor, see the
ADSP-2100 Family
User’s Manual, Third Edition
. For more information about the
development tools, refer to the ADSP-2100 Family Develop-
ment Tools Data Sheet.
ARCHITECTURE OVERVIEW
The ADSP-2185L instruction set provides flexible data moves
and multifunction (one or two data moves with a computation)
instructions. Every instruction can be executed in a single pro-
cessor cycle. The ADSP-2185L assembly language uses an alge-
braic syntax for ease of coding and readability. A comprehensive
set of development tools supports program development.
SERIAL PORTS
SPORT 1
SPORT 0
MEMORY
PROGRI/O
FAND
CBYTE DMA
8K
3
8K
3
24 OVERLAY 1
TIMER
ADSP-2100 BASE
ARCHITECTURE
SHIFTER
MAC
ALU
ARITHMETIC UNITS
PCONTROL
SPROGRAM
DAG 2
DAG 1
GENERATORS
PROGRAM MEMORY ADDRESS
DATA MEMORY ADDRESS
PROGRAM MEMORY DATA
DATA MEMORY DATA
EXDATA
BUS
ADDRESS
BUS
INDMA
PORT
EXDATA
BUS
OR
FUL MODE
HOST MODE
8K
3
8K
3
16 OVERLAY 1
(
) (
)
16K
3
24 PM
16K
3
16 DM
Figure 1. Functional Block Diagram
Figure 1 is an overall block diagram of the ADSP-2185L. The
processor contains three independent computational units: the
ALU, the multiplier/accumulator (MAC) and the shifter. The
computational units process 16-bit data directly and have provi-
sions to support multiprecision computations. The ALU per-
forms a standard set of arithmetic and logic operations; division
primitives are also supported. The MAC performs single-cycle
multiply, multiply/add and multiply/subtract operations with
40 bits of accumulation. The shifter performs logical and arith-
metic shifts, normalization, denormalization and derive expo-
nent operations.
The shifter can be used to efficiently implement numeric for-
mat control including multiword and block floating-point
representations.
The internal result (R) bus connects the computational units so
that the output of any unit may be the input of any unit on the
next cycle.
EZ-ICE and SoundPort are registered trademarks of Analog Devices, Inc.
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