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參數(shù)資料
| 型號： | ADSP-2181BSTZ-133 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 128TQFP |
| 產(chǎn)品變化通告： | Mold Change 11/Jul/2012 |
| 標準包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點 |
| 接口： | 同步串行端口（SSP） |
| 時鐘速率： | 33.3MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 80kB |
| 電壓 - 輸入/輸出： | 5.00V |
| 電壓 - 核心： | 5.00V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應商設備封裝： | 128-TQFP（14x20） |
| 包裝： | 托盤 |
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ADSP-2181
–25–
REV. D
OUTPUT DRIVE CURRENTS
Figure 19 shows typical I-V characteristics for the output drivers
of the ADSP-2181. The curves represent the current drive
capability of the output drivers as a function of output voltage.
SOURCE VOLTAGE – Volts
SOURCE
CURRENT
–
mA
120
–80
01
6
23
45
100
0
–20
–40
–60
80
60
20
40
5.5V, –40 C
5.0V, +25 C
4.5V, +85 C
5.0V, +25 C
5.5V, –40 C
Figure 19. Typical Drive Currents
POWER DISSIPATION
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
C
× V
DD
2
× f
C = load capacitance, f = output switching frequency.
Example:
In an application where external data memory is used and no
other outputs are active, power dissipation is calculated as
follows:
Assumptions:
External data memory is accessed every cycle with 50% of the
address pins switching.
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
The application operates at V
DD = 5.0 V and tCK = 30 ns.
Total Power Dissipation = PINT + (C
× V
DD
2
× f )
PINT = internal power dissipation from Power vs. Frequency
graph (Figure 20).
TEMPERATURE –
°C
1000
1
100
10
CURRENT
(LOG
SCALE)
–
A
585
15
25
35
45
55
65
75
–5
VDD = 5.5V
VDD = 5.0V
VDD = 4.5V
NOTES:
1. REFLECTS ADSP-2181 OPERATION IN LOWEST POWER MODE.
(SEE “SYSTEM INTERFACE" CHAPTER OF THE
ADSP-2100 FAMILY
USER'S MANUAL, THIRD EDITION, FOR DETAILS.)
2. CURRENT REFLECTS DEVICE OPERATING WITH NO OUTPUT LOADS.
Figure 20. Power-Down Supply Current (Typical)
(C
× V
DD
2
× f ) is calculated for each output:
# of
Pins
× C
× V
DD
2
× f
Address,
DMS
8
× 10 pF × 52 V × 33.3 MHz = 66.6 mW
Data Output,
WR 9
× 10 pF × 52 V × 16.67 MHz = 37.5 mW
RD
1
× 10 pF × 52 V × 16.67 MHz =
4.2 mW
CLKOUT
1
× 10 pF × 52 V × 33.3 MHz =
8.3 mW
116.6 mW
Total power dissipation for this example is PINT + 116.6 mW.
1/tCK – MHz
POWER
(P
INT
)–
mW
220
30
32
42
34
36
38
40
420
370
320
270
570
470
520
2181 POWER, INTERNAL1, 3, 4
VDD = 5.5V
VDD = 5.0V
VDD = 4.5V
410mW
325mW
250mW
550mW
425mW
330mW
28
POWER
(P
IDLE
)–
mW
1/tCK – MHz
100
40
30
32
42
34
36
38
40
70
60
50
90
80
30
POWER, IDLE1, 2, 3
VDD = 5.5V
VDD = 5.0V
VDD = 4.5V
77mW
60mW
45mW
95mW
75mW
54mW
28
1/tCK – MHz
POWER
(P
IDLE
n
)–
mW
80
30
32
42
34
36
38
40
75
50
45
40
35
70
65
55
60
POWER, IDLE
n MODES3
IDLE
IDLE (16)
IDLE (128)
60mW
35mW
34mW
39mW
37mW
75mW
28
VALID FOR ALL TEMPERATURE GRADES.
4IDD MEASUREMENT TAKEN WITH ALL INSTRUCTIONS EXECUTING FROM INTERNAL
MEMORY. 50% OF THE INSTRUCTIONS ARE MULTIFUNCTION (TYPES 1, 4, 5, 12, 13, 14),
30% ARE TYPE 2 AND TYPE 6 AND 20% ARE IDLE INSTRUCTIONS.
3TYPICAL POWER DISSIPATION AT 5.0V VDD AND 25 C EXCEPT WHERE SPECIFIED.
2IDLE REFERS TO ADSP-2181 STATE OF OPERATION DURING EXECUTION OF IDLE
1POWER REFLECTS DEVICE OPERATING WITH NO OUTPUT LOADS.
INSTRUCTION. DEASSERTED PINS ARE DRIVEN TO EITHER VDD OR GND.
Figure 21. Power vs. Frequency
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參數(shù)描述 |
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| ADSP-2181BSTZ-133 | 制造商:Analog Devices 功能描述:IC 16-BIT MICROCOMPUTER |
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| ADSP2181KS133 | 制造商:AD 功能描述:New 制造商:Analog Devices 功能描述: |
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