參數(shù)資料
型號(hào): ADSP-21479BSWZ-2A
廠商: Analog Devices Inc
文件頁(yè)數(shù): 32/72頁(yè)
文件大?。?/td> 0K
描述: IC DSP SHARC 266MHZ LP 100LQFP
標(biāo)準(zhǔn)包裝: 1
系列: SHARC®
類(lèi)型: 浮點(diǎn)
接口: DAI,DPI,EBI/EMI,I²C,SPI,SPORT,UART/USART
時(shí)鐘速率: 266MHz
非易失內(nèi)存: ROM(4Mb)
芯片上RAM: 5Mb
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.20V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 100-LQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 100-LQFP-EP(14x14)
包裝: 托盤(pán)
Rev. A
|
Page 38 of 72
|
September 2011
Serial Ports
In slave transmitter mode and master receiver mode, the maxi-
mum serial port frequency is fPCLK/8. In master transmitter
mode and slave receiver mode, the maximum serial port clock
frequency is fPCLK/4.
To determine whether communication is possible between two
devices at clock speed, n, the following specifications must be
confirmed: 1) frame sync delay and frame sync setup and hold,
2) data delay and data setup and hold, and 3) SCLK width.
Serial port signals (SCLK, FS, Data Channel A, Data Channel B)
are routed to the DAI_P20–1 pins using the SRU. Therefore, the
timing specifications provided below are valid at the
DAI_P20–1 pins.
Table 33. Serial Ports—External Clock
Parameter
Min
Max
Unit
Timing Requirements
tSFSE
1
Frame Sync Setup Before SCLK
(Externally Generated Frame Sync in Either Transmit or Receive Mode)
2.5
ns
tHFSE
1
Frame Sync Hold After SCLK
(Externally Generated Frame Sync in Either Transmit or Receive Mode)
2.5
ns
tSDRE
1
Receive Data Setup Before Receive SCLK
2.5
ns
tHDRE
1
Receive Data Hold After SCLK
2.5
ns
tSCLKW
SCLK Width
(tPCLK × 4) ÷ 2 – 1.5
ns
tSCLK
SCLK Period
tPCLK × 4
ns
Switching Characteristics
tDFSE
2
Frame Sync Delay After SCLK
(Internally Generated Frame Sync in Either Transmit or Receive Mode)
15
ns
tHOFSE
2
Frame Sync Hold After SCLK
(Internally Generated Frame Sync in Either Transmit or Receive Mode)
2
ns
tDDTE
2
Transmit Data Delay After Transmit SCLK
15
ns
tHDTE
2
Transmit Data Hold After Transmit SCLK
2
ns
1 Referenced to sample edge.
2 Referenced to drive edge.
Table 34. Serial Ports—Internal Clock
Parameter
Min
Max
Unit
Timing Requirements
tSFSI
1
Frame Sync Setup Before SCLK
(Externally Generated Frame Sync in Either Transmit or Receive Mode)
10.5
ns
tHFSI
1
Frame Sync Hold After SCLK
(Externally Generated Frame Sync in Either Transmit or Receive Mode)
2.5
ns
tSDRI
1
Receive Data Setup Before SCLK
10.5
ns
tHDRI
1
Receive Data Hold After SCLK
2.5
ns
Switching Characteristics
tDFSI
2
Frame Sync Delay After SCLK (Internally Generated Frame Sync in Transmit Mode)
5
ns
tHOFSI
2
Frame Sync Hold After SCLK (Internally Generated Frame Sync in Transmit Mode)
–1.0
ns
tDFSIR
2
Frame Sync Delay After SCLK (Internally Generated Frame Sync in Receive Mode)
10.7
ns
tHOFSIR
2
Frame Sync Hold After SCLK (Internally Generated Frame Sync in Receive Mode)
–1.0
ns
tDDTI
2
Transmit Data Delay After SCLK
4
ns
tHDTI
2
Transmit Data Hold After SCLK
–1.0
ns
tSCKLIW
Transmit or Receive SCLK Width
2 × tPCLK – 1.5
2 × tPCLK + 1.5
ns
1 Referenced to the sample edge.
2 Referenced to drive edge.
相關(guān)PDF資料
PDF描述
ECC13DRYH-S13 CONN EDGECARD 26POS .100 EXTEND
IRU1030-33CMTR IC REG LDO 3.3V 3A TO-263-3
ADSP-BF516BSWZ-3 IC DSP 16/32B 300MHZ LP 176LQFP
TAJC476M006RNJ CAP TANT 47UF 6.3V 20% 2312
ECC13DRES-S13 CONN EDGECARD 26POS .100 EXTEND
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-21479KBCZ-1A 功能描述:IC DSP SHARK 200MHZ 196CSPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號(hào)處理器) 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類(lèi)型:SC140 內(nèi)核 接口:DSI,以太網(wǎng),RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類(lèi)型:表面貼裝 封裝/外殼:431-BFBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA(20x20) 包裝:托盤(pán)
ADSP-21479KBCZ-2A 功能描述:IC DSP SHARC 266MHZ LP 196CSPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號(hào)處理器) 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類(lèi)型:SC140 內(nèi)核 接口:DSI,以太網(wǎng),RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類(lèi)型:表面貼裝 封裝/外殼:431-BFBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA(20x20) 包裝:托盤(pán)
ADSP-21479KBCZ-3A 功能描述:IC DSP SHARK 300MHZ 196CSPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號(hào)處理器) 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類(lèi)型:SC140 內(nèi)核 接口:DSI,以太網(wǎng),RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類(lèi)型:表面貼裝 封裝/外殼:431-BFBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA(20x20) 包裝:托盤(pán)
ADSP-21479KBCZ-3AX 制造商:Analog Devices 功能描述:- Trays
ADSP-21479KBCZ-ENG 制造商:Analog Devices 功能描述:SHARC PROCESSOR - Trays