1
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ADSP-21369KBPZ-2A
寤犲晢锛� Analog Devices Inc
鏂囦欢闋佹暩(sh霉)锛� 14/64闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC DSP 32BIT 333MHZ 256-BGA
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� SHARC Processor Overview
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 1
绯诲垪锛� SHARC®
椤炲瀷锛� 娴粸
鎺ュ彛锛� DAI锛孌PI
鏅傞悩閫熺巼锛� 333MHz
闈炴槗澶卞収(n猫i)瀛橈細 ROM锛�768 kB锛�
鑺墖涓奟AM锛� 256kB
闆诲 - 杓稿叆/杓稿嚭锛� 3.30V
闆诲 - 鏍稿績锛� 1.20V
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 256-LBGA 瑁搁湶鐒婄洡
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 256-BGA锛�27x27锛�
鍖呰锛� 鎵樼洡
閰嶇敤锛� ADZS-21369-EZLITE-ND - KIT EVAL EZ LITE ADDS-21369
Rev. F
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Page 21 of 64
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October 2013
Clock Input
Table 13. Clock Input
Parameter
400 MHz
1
1 Applies to all 400 MHz models. See Ordering Guide on Page 61.
366 MHz
2
2 Applies to all 366 MHz models. See Ordering Guide on Page 61.
350 MHz
3
3 Applies to all 350 MHz models. See Ordering Guide on Page 61.
333 MHz
4
4 Applies to all 333 MHz models. See Ordering Guide on Page 61.
266 MHz
5
5 Applies to all 266 MHz models. See Ordering Guide on Page 61.
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Timing Requirements
t
CK
CLKIN Period
156
6 Applies only for CLK_CFG1鈥�0 = 00 and default values for PLL control bits in PMCTL.
100
16.396
100
17.146
100
186
100
22.56
100
ns
t
CKL
CLKIN Width Low
7.51
45
8.11
45
8.51
45
91
45
11.251
45
ns
t
CKH
CLKIN Width High
7.5
1
45
8.1
1
45
8.5
1
45
9
1
45
11.25
1
45
ns
t
CKRF
CLKIN Rise/Fall (0.4 V to 2.0 V)
3
ns
t
CCLK
7
7 Any changes to PLL control bits in the PMCTL register must meet core clock timing specification t
CCLK.
CCLK Period
2.5
10
2.73
10
2.85
10
3.0
10
3.75
10
ns
f
VCO
8
8 See Figure 5 on Page 19 for VCO diagram.
VCO Frequency
100
800
100
800
100
800
100
800
600
MHz
t
CKJ
9, 10
9 Actual input jitter should be combined with ac specifications for accurate timing analysis.
10Jitter specification is maximum peak-to-peak time interval error (TIE) jitter.
CLKIN Jitter Tolerance
鈥�250
+250
鈥�250
+250
鈥�250
+250
鈥�250
+250
鈥�250
+250
ps
Figure 7. Clock Input
CLKIN
tCK
tCKL
tCKH
tCKJ
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
ADSP-21369KBPZ-3A 鍔熻兘鎻忚堪:IC DSP 32BIT 400MHZ 256-BGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - DSP锛堟暩(sh霉)瀛楀紡淇¤櫉铏曠悊鍣級 绯诲垪:SHARC® 妯�(bi膩o)婧�(zh菙n)鍖呰:40 绯诲垪:TMS320DM64x, DaVinci™ 椤炲瀷:瀹氶粸 鎺ュ彛:I²C锛孧cASP锛孧cBSP 鏅傞悩閫熺巼:400MHz 闈炴槗澶卞収(n猫i)瀛�:澶栭儴 鑺墖涓奟AM:160kB 闆诲 - 杓稿叆/杓稿嚭:3.30V 闆诲 - 鏍稿績:1.20V 宸ヤ綔婧害:0°C ~ 90°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:548-BBGA锛孎(xi脿n)CBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:548-FCBGA锛�27x27锛� 鍖呰:鎵樼洡 閰嶇敤:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
ADSP-21369KSWZ-1A 鍔熻兘鎻忚堪:IC DSP 32BIT 266MHZ 208-LQFP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - DSP锛堟暩(sh霉)瀛楀紡淇¤櫉铏曠悊鍣級 绯诲垪:SHARC® 妯�(bi膩o)婧�(zh菙n)鍖呰:40 绯诲垪:TMS320DM64x, DaVinci™ 椤炲瀷:瀹氶粸 鎺ュ彛:I²C锛孧cASP锛孧cBSP 鏅傞悩閫熺巼:400MHz 闈炴槗澶卞収(n猫i)瀛�:澶栭儴 鑺墖涓奟AM:160kB 闆诲 - 杓稿叆/杓稿嚭:3.30V 闆诲 - 鏍稿績:1.20V 宸ヤ綔婧害:0°C ~ 90°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:548-BBGA锛孎(xi脿n)CBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:548-FCBGA锛�27x27锛� 鍖呰:鎵樼洡 閰嶇敤:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
ADSP-21369KSWZ-1AX 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:- Trays
ADSP-21369KSWZ-2A 鍔熻兘鎻忚堪:IC DSP 32BIT 233MHZ 208-LQFP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - DSP锛堟暩(sh霉)瀛楀紡淇¤櫉铏曠悊鍣級 绯诲垪:SHARC® 妯�(bi膩o)婧�(zh菙n)鍖呰:40 绯诲垪:TMS320DM64x, DaVinci™ 椤炲瀷:瀹氶粸 鎺ュ彛:I²C锛孧cASP锛孧cBSP 鏅傞悩閫熺巼:400MHz 闈炴槗澶卞収(n猫i)瀛�:澶栭儴 鑺墖涓奟AM:160kB 闆诲 - 杓稿叆/杓稿嚭:3.30V 闆诲 - 鏍稿績:1.20V 宸ヤ綔婧害:0°C ~ 90°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:548-BBGA锛孎(xi脿n)CBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:548-FCBGA锛�27x27锛� 鍖呰:鎵樼洡 閰嶇敤:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
ADSP-21369KSWZ-4A 鍔熻兘鎻忚堪:IC DSP 32BIT 350MHZ 208-LQFP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - DSP锛堟暩(sh霉)瀛楀紡淇¤櫉铏曠悊鍣級 绯诲垪:SHARC® 妯�(bi膩o)婧�(zh菙n)鍖呰:2 绯诲垪:StarCore 椤炲瀷:SC140 鍏�(n猫i)鏍� 鎺ュ彛:DSI锛屼互澶恫(w菐ng)锛孯S-232 鏅傞悩閫熺巼:400MHz 闈炴槗澶卞収(n猫i)瀛�:澶栭儴 鑺墖涓奟AM:1.436MB 闆诲 - 杓稿叆/杓稿嚭:3.30V 闆诲 - 鏍稿績:1.20V 宸ヤ綔婧害:-40°C ~ 105°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:431-BFBGA锛孎(xi脿n)CBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:431-FCPBGA锛�20x20锛� 鍖呰:鎵樼洡
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