參數(shù)資料
型號(hào)： ADSP-21266SKBC-2B
廠商： ANALOG DEVICES INC
元件分類(lèi)： 數(shù)字信號(hào)處理
英文描述： SHARC Embedded Processor
中文描述： 16-BIT, 66.67 MHz, OTHER DSP, PBGA136
封裝： MO-205AE, BGA-136
文件頁(yè)數(shù)： 18/44頁(yè)
文件大?。?/td> 426K
代理商： ADSP-21266SKBC-2B
Rev. B
|
Page 18 of 44
|
May 2005
ADSP-21266
Power-Up Sequencing
The timing requirements for DSP startup are given in
Table 10
and
Figure 6
.
Table 10. Power-Up Sequencing (DSP Startup)
Parameter
Min
Max
Unit
Timing Requirements
t
RSTVDD
t
IVDDEVDD
t
CLKVDD
t
CLKRST
t
PLLRST
RESET Low Before V
DDINT
/V
DDEXT
On
V
DDINT
On Before V
DDEXT
CLKIN Valid After V
DDINT
/V
DDEXT
Valid
1
CLKIN Valid Before RESET Deasserted
0
ns
–50
200
ms
0
10
2
20
3
200
ms
μs
PLL Control Setup Before RESET Deasserted
μs
Switching Characteristic
t
CORERST
DSP Core Reset Deasserted After RESET Deasserted
4096t
CK
4,
5
1
Valid V
/V
assumes that the supplies are fully ramped to their 1.2 and 3.3 volt rails. Voltage ramp rates can vary from microseconds to hundreds of milliseconds
depending on the design of the power supply subsystem.
2
Assumes a stable CLKIN signal, after meeting worst-case startup timing of crystal oscillators. Refer to the crystal oscillator manufacturer’s data sheet for startup time.
Assume a 25 ms maximum oscillator startup time if using the XTAL pin and internal oscillator circuit in conjunction with an external crystal.
3
Based on CLKIN cycles.
4
Applies after the power-up sequence is complete. Subsequent resets require a minimum of four CLKIN cycles for RESET to be held low in order to properly initialize and
propagate default states at all I/O pins.
5
The 4096 cycle count depends on t
SRST
specification in
Table 12
. If setup time is not met, one additional CLKIN cycle may be added to the core reset time, resulting in
4097 cycles maximum.
Figure 6. Power-Up Sequencing
CLKIN
RESET
t
RSTVDD
RSTOUT
VDDEXT
VDDINT
t
PLLRST
t
CLKRST
t
CLKVDD
t
IVDDEVDD
CLK_CFG1–0
t
CORERST
MULTIPLEXEDWITHCLKOUT
*
*
相關(guān)PDF資料
PDF描述
ADSP-21266SKBCZ-2B SHARC Embedded Processor
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ADSP-21266SKBCZ-2D SHARC Embedded Processor
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-21266SKBCZ-2B 制造商:Analog Devices 功能描述:
ADSP-21266SKBCZ-2C 制造商:Analog Devices 功能描述: 制造商:Analog Devices 功能描述:DSP FLOATING PT 32BIT 200MHZ 200MIPS 136CSPBGA - Trays
ADSP-21266SKBCZ-2D 功能描述:IC DSP 32BIT 200MHZ 136-CSPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類(lèi)型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類(lèi)型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤(pán)
ADSP-21266SKSTZ-1B 制造商:Analog Devices 功能描述: 制造商:Analog Devices 功能描述:DSP FLOATING PT 32BIT 150MHZ 150MIPS 144LQFP - Trays
ADSP-21266SKSTZ-1C 制造商:Analog Devices 功能描述:DSP Floating-Point 32-Bit 150MHz 150MIPS 144-Pin LQFP 制造商:Analog Devices 功能描述:DSP FLOATING PT 32BIT 150MHZ 150MIPS 144LQFP - Trays
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