參數(shù)資料
型號(hào)： ADSP-21262
廠商： Analog Devices, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： SHARC Processor
中文描述： SHARC處理器
文件頁數(shù)： 15/44頁
文件大?。?/td> 1295K
代理商： ADSP-21262
ADSP-21262
Rev. A
|
Page 15 of 44
|
May 2004
ADSP-21262 SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS
Parameter
1
1
Specifications subject to change without notice.
2
Applies to input and bidirectional pins: AD15-0, FLAG3-0, DAI_Px, SPICLK, MOSI, MISO, SPIDS, BOOTCFGx, CLKCFGx, RESET, TCK, TMS, TDI, TRST.
3
Applies to input pin CLKIN.
4
See
Thermal Characteristics on Page 38
for information on thermal specifications.
5
See Engineer-to-Engineer Note (No. 216) for further information.
K Grade
Min
Max
Unit
V
DDINT
Internal (Core) Supply Voltage
1.14
1.26
V
A
VDD
Analog (PLL) Supply Voltage
1.14
1.26
V
V
DDEXT
External (I/O) Supply Voltage
3.13
3.47
V
V
IH
High Level Input Voltage
2
, @ V
DDEXT
= max
2.0
V
DDEXT
+ 0.5
V
V
IL
Low Level Input Voltage
2
@ V
DDEXT
= min
–0.5
+0.8
V
V
IH_CLKIN
High Level Input Voltage
3
, @ V
DDEXT
= max
1.74
V
DDEXT
+ 0.5
V
V
IL_CLKIN
Low Level Input Voltage, @ V
DDEXT
= min
–0.5
+1.28
V
T
AMB
Ambient Operating Temperature
4,
5
0
+70
°
C
Parameter
1
V
OH
V
OL
I
IH
I
IL
I
ILPU
I
OZH
I
OZL
I
OZLPU
I
DD-INTYP
AI
DD
C
IN
Test Conditions
@ V
DDEXT
= min, I
OH
= –1.0 mA
3
@ V
DDEXT
= min, I
OL
= 1.0 mA
3
@ V
DDEXT
= max, V
IN
= V
DDEXT
max
@ V
DDEXT
= max, V
IN
= 0 V
@ V
DDEXT
= max, V
IN
= 0 V
@ V
DDEXT
= max, V
IN
= V
DDEXT
max
@ V
DDEXT
= max, V
IN
= 0 V
@ V
DDEXT
= max, V
IN
= 0 V
t
CCLK
= 5.0 ns, V
DDINT
= 1.2 V, T
AMB
= +25
°
C
A
VDD
= max
f
IN
= 1 MHz, T
CASE
= 25°C, V
IN
= 1.2 V
Min
2.4
Max
Unit
V
V
μA
μA
μA
μA
μA
μA
mA
mA
pF
High Level Output Voltage
2
Low Level Output Voltage
2
High Level Input Current
4, 5
Low Level Input Current
4
Low Level Input Current Pull-Up
5
Three-State Leakage Current
6,
7,
8
Three-State Leakage Current
6
Three-State Leakage Current Pull-Up
7
Supply Current (Internal)
9, 10, 11
Supply Current (Analog)
12
Input Capacitance
13,
14
0.4
10
10
200
10
10
200
500
10
4.7
1
Specifications subject to change without notice.
2
Applies to output and bidirectional pins: AD15-0, RD, WR, ALE, FLAG3-0, DAI_Px, SPICLK, MOSI, MISO, EMU, TDO, CLKOUT, XTAL.
3
See
Output Drive Currents on Page 37
for typical drive current capabilities.
4
Applies to input pins: SPIDS, BOOTCFGx, CLKCFGx, TCK, RESET, CLKIN.
5
Applies to input pins with 22.5 k
internal pull-ups: TRST, TMS, TDI.
6
Applies to three-statable pins: FLAG3-0.
7
Applies to three-statable pins with 22.5 k
pull-ups: AD15-0, DAI_Px, SPICLK, MISO, MOSI.
8
Applies to open-drain output pins: EMU, MISO, MOSI.
9
Typical internal current data reflects nominal operating conditions.
10
See Engineer-to-Engineer Note (No. 216) for further information.
11
Characterized, but not tested.
12
Characterized, but not tested.
13
Applies to all signal pins.
14
Guaranteed, but not tested.
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