參數(shù)資料
型號(hào): ADSP-2115BPZ-100
廠商: Analog Devices Inc
文件頁(yè)數(shù): 12/64頁(yè)
文件大小: 0K
描述: IC DSP CONTROLLER 16BIT 68-PLCC
標(biāo)準(zhǔn)包裝: 19
系列: ADSP-21xx
類型: 定點(diǎn)
接口: 同步串行端口(SSP)
時(shí)鐘速率: 25MHz
非易失內(nèi)存: 外部
芯片上RAM: 3kB
電壓 - 輸入/輸出: 5.00V
電壓 - 核心: 5.00V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 68-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 68-PLCC(24.23x24.23)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 738 (CN2011-ZH PDF)
ADSP-21xx
–2–
REV. B
Fabricated in a high speed, submicron, double-layer metal
CMOS process, the highest-performance ADSP-21xx proces-
sors operate at 25 MHz with a 40 ns instruction cycle time.
Every instruction can execute in a single cycle. Fabrication in
CMOS results in low power dissipation.
The ADSP-2100 Family’s flexible architecture and compre-
hensive instruction set support a high degree of parallelism.
In one cycle the ADSP-21xx can perform all of the following
operations:
Generate the next program address
Fetch the next instruction
Perform one or two data moves
Update one or two data address pointers
Perform a computation
Receive and transmit data via one or two serial ports
Receive and/or transmit data via the host interface port
(ADSP-2111 only)
The ADSP-2101, ADSP-2105, and ADSP-2115 comprise the
basic set of processors of the family. Each of these three devices
contains program and data memory RAM, an interval timer,
and one or two serial ports. The ADSP-2103 is a 3.3 volt
power supply version of the ADSP-2101; it is identical to the
ADSP-2101 in all other characteristics. Table I shows the
features of each ADSP-21xx processor.
The ADSP-2111 adds a 16-bit host interface port (HIP) to the
basic set of ADSP-21xx integrated features. The host port
provides a simple interface to host microprocessors or
microcontrollers such as the 8031, 68000, or ISA bus.
TABLE OF CONTENTS
GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . 1
Development Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Additional Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
ARCHITECTURE OVERVIEW . . . . . . . . . . . . . . . . . . . . 4
Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Host Interface Port (ADSP-2111) . . . . . . . . . . . . . . . . . . . . 6
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
SYSTEM INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Program Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . 10
Program Memory Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Data Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Data Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Boot Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Low Power IDLE Instruction . . . . . . . . . . . . . . . . . . . . . . 13
ADSP-216x Prototyping . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Ordering Procedure for ADSP-216x ROM Processors . . . . 13
Wafer Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Functional Differences for Older Revision Devices . . . . . . 14
Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SPECIFICATIONS
(ADSP-2101/2105/2115/2161/2163) . . . . . . . . . . . . . . . 17
Recommended Operating Conditions . . . . . . . . . . . . . . . . 17
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Supply Current & Power (ADSP-2101/2161/2163) . . . . . . 18
Power Dissipation Example . . . . . . . . . . . . . . . . . . . . . . . . 19
Environmental Conditions . . . . . . . . . . . . . . . . . . . . . . . . . 19
Capacitive Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SPECIFICATIONS
(ADSP-2111) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Recommended Operating Conditions . . . . . . . . . . . . . . . . 21
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Supply Current & Power . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Power Dissipation Example . . . . . . . . . . . . . . . . . . . . . . . . 23
Environmental Conditions . . . . . . . . . . . . . . . . . . . . . . . . . 23
Capacitive Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SPECIFICATIONS (ADSP-2103/2162/2164) . . . . . . . . . 25
Recommended Operating Conditions . . . . . . . . . . . . . . . . 25
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Supply Current & Power . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Power Dissipation Example . . . . . . . . . . . . . . . . . . . . . . . . 27
Environmental Conditions . . . . . . . . . . . . . . . . . . . . . . . . . 27
Capacitive Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
TIMING PARAMETERS
(ADSP-2101/2105/2111/2115/2161/2163) . . . . . . . . . . . . 29
Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Interrupts & Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Bus Request–Bus Grant . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Memory Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Memory Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Host Interface Port (ADSP-2111) . . . . . . . . . . . . . . . . . . . 36
TIMING PARAMETERS (ADSP-2103/2162/2164) . . . . 44
Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Interrupts & Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Bus Request–Bus Grant . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Memory Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Memory Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
PIN CONFIGURATIONS
68-Pin PGA (ADSP-2101) . . . . . . . . . . . . . . . . . . . . . . . . 51
68-Lead PLCC (ADSP-2101/2103/2105/2115/216x) . . . . 52
80-Lead PQFP (ADSP-2101/2103/2115/216x) . . . . . . . . . 53
80-Lead TQFP (ADSP-2115) . . . . . . . . . . . . . . . . . . . . . . 53
100-Pin PGA (ADSP-2111) . . . . . . . . . . . . . . . . . . . . . . . 54
100-Lead PQFP (ADSP-2111) . . . . . . . . . . . . . . . . . . . . . 55
PACKAGE OUTLINE DIMENSIONS
68-Pin PGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
68-Lead PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
80-Lead PQFP, 80-Lead TQFP . . . . . . . . . . . . . . . . . . . . 58
100-Pin PGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
100-Lead PQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . 61-62
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