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| 型號： | ADSP-21065LCS-240 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | 32-BIT, 33.33 MHz, OTHER DSP, PQFP208 |
| 封裝： | MS-029FA-1, MQFP-208 |
| 文件頁數(shù)： | 13/44頁 |
| 文件大小： | 331K |
| 代理商： | ADSP-21065LCS-240 |
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REV. B
ADSP-21065L
–13–
POWER DISSIPATION ADSP-21065L
These specifications apply to the internal power portion of V
DD
only. See the Power Dissipation section of this data sheet for calcula-
tion of external supply current and total supply current. For a complete discussion of the code used to measure power dissipation, see
the technical note SHARC Power Dissipation Measurements.
Specifications are based on the following operating scenarios:
Table II. Internal Current Measurements
Peak Activity
(I
DDINPEAK
)
Multifunction
Cache
2 per Cycle (DM and PM)
1 per Cycle
High Activity
(I
DDINHIGH
)
Multifunction
Internal Memory
1 per Cycle (DM)
1 per 2 Cycles
Operation
Low Activity (I
DDINLOW
)
Single Function
Internal Memory
None
1 per 2 Cycles
Instruction Type
Instruction Fetch
Core Memory Access
Internal Memory DMA
To estimate power consumption for a specific application, use the following equation where % is the amount of time your program
spends in that state:
%
PEAK
×
I
DDINPEAK
+ %
HIGH
×
I
DDINHIGH
+ %
LOW
×
I
DDINLOW
+ %
IDLE
16
×
I
DDIDLE
16
=
POWER CONSUMPTION
Table III. Internal Current Measurement Scenarios
Parameter
Test Conditions
Max
Units
I
DDINPEAK
Supply Current (Internal)
1
t
CK
= 33 ns, V
DD
= max
t
CK
= 30 ns, V
DD
= max
t
CK
= 33 ns, V
DD
= max
t
CK
= 30 ns, V
DD
= max
t
CK
= 33 ns, V
DD
= max
t
CK
= 30 ns, V
DD
= max
t
CK
= 33 ns, V
DD
= max
t
CK
= 30 ns, V
DD
= max
V
DD
= max
470
510
275
300
240
260
150
155
50
mA
mA
mA
mA
mA
mA
mA
mA
mA
I
DDINHIGH
Supply Current (Internal)
2
I
DDINLOW
Supply Current (Internal)
3
I
DDIDLE
Supply Current (IDLE)
4
I
DDIDLE16
Supply Current (IDLE16)
5
NOTES
1
The test program used to measure I
DDINPEAK
represents worst case processor operation and is not sustainable under normal application conditions. Actual internal
power measurements made using typical applications are less than specified.
2
I
DDINHIGH
is a composite average based on a range of high activity code.
3
I
DDINLOW
is a composite average based on a range of low activity code.
4
IDLE denotes ADSP-21065L state during execution of IDLE instruction.
5
IDLE16 denotes ADSP-21065L state during execution of IDLE16 instruction.
TIMING SPECIFICATIONS
General Notes
Two speed grades of the ADSP-21065L are offered, 60 MHz and 66 MHz instruction rates. The specifications shown are based on a
CLKIN frequency of 30 MHz (t
CK
= 33.3 ns). The DT derating allows specifications at other CLKIN frequencies (within the min–
max range of the t
CK
specification; see Clock Input below). DT is the difference between the actual CLKIN period and a CLKIN
period of 33.3 ns:
DT
= (
t
CK
– 33.3)/32
Use the exact timing information given. Do not attempt to derive parameters from the addition or subtraction of others. While addi-
tion or subtraction would yield meaningful results for an individual device, the values given in this data sheet reflect statistical varia-
tions and worst cases. Consequently, you cannot meaningfully add parameters to derive longer times.
See Figure 27 in Equivalent Device Loading for AC Measurements (Includes All Fixtures) for voltage reference levels.
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| ADSP-21065LCSZ-240 | 功能描述:IC DSP CONTROLLER 32BIT 208-MQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-21065LKCA-240 | 功能描述:IC DSP CTLR 32BIT 196CSPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21065LKCA-264 | 功能描述:IC DSP CTLR 32BIT 196CSPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21065LKCAZ240 | 功能描述:IC DSP CTLR 32BIT 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-21065LKCAZ-240 | 制造商:Analog Devices 功能描述:DSP SEMICONDUCTOR ((NS)) |
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