參數(shù)資料
型號(hào): ADS803U
元件分類: DC/DC變換器
英文描述: REC3-SR_DR/H1 Series - Econoline Regulated DC-DC Converters; Input Voltage (Vdc): 12V; Output Voltage (Vdc): 12V; Power: 3W; Low Cost 3W converter in DIP24 Package; 1kVDC Isolation; Regulated Output; UL Approved; Continuous Short Circuit Protection; Internal SMD design; 3 Pinout Options, 3 Case Styles.; Efficiency to 75%
中文描述: 12位,5MHz的采樣模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù): 11/12頁(yè)
文件大?。?/td> 255K
代理商: ADS803U
11
ADS803
3.5V
1.5V
IN
IN
+1V
SEL
V
REF
+2.5V ext.
ADS803
V
IN
V
IN
5V
0V
IN
IN
+2.5V
SEL
V
REF
ADS803
FIGURE 10. External Reference, Input Range 0.5V to 4.5V
(4Vp-p), with +2.5V Common-Mode Voltage.
FIGURE 8. Internal Reference with 1.5V to 3.5V Input
Range.
FIGURE 9. Internal Reference with 1V to 4V Input Range.
FIGURE 7. Internal Reference with 0V to 5V Input Range.
SELECTING THE INPUT RANGE AND
REFERENCE
Figures 7 through 9 show a selection of circuits for the most
common input ranges when using the internal reference of
the ADS803. All examples are for single-ended input and
operate with a nominal common-mode voltage of +2.5V.
EXTERNAL REFERENCE OPERATION
Depending on the application requirements, it might be
advantageous to operate the ADS803 with an external refer-
ence. This may improve the DC accuracy if the external
reference circuitry is superior in its drift and accuracy. To
use the ADS803 with an external reference, the user must
disable the internal reference (see Figure 10). By connecting
the SEL pin to +V
S
, the internal logic will shut down the
internal reference. At the same time, the output of the
internal reference buffer is disconnected from the V
REF
pin,
which now must be driven with the external reference. Note
that a similar bypassing scheme should be maintained as
described for the internal reference operation.
DIGITAL INPUTS AND OUTPUTS
Over Range (OVR)
One feature of the ADS803 is its ‘Over Range’ digital output
(OVR). This pin can be used to monitor any out-of-range
condition, which occurs every time the applied analog input
voltage exceeds the input range (set by V
REF
). The OVR
output is LOW when the input voltage is within the defined
input range. It becomes HIGH when the input voltage is
beyond the input range. This is the case when the input
voltage is either below the bottom reference voltage or
above the top reference voltage. OVR will remain active
until the analog input returns to its normal signal range and
another conversion is completed. Using the MSB and its
complement in conjunction with OVR, a simple clue logic
can be built that detects the overrange and underrange
conditions (see Figure 11). It should be noted that OVR is a
digital output which is updated along with the bit informa-
tion corresponding to the particular sampling incidence of
the analog signal. Therefore, the OVR data is subject to the
same pipeline delay (latency) as the digital data.
4V
1V
IN
IN
SEL
V
REF
+2.5V ext.
V
REF
= 1V
1 +
R
1
R
2
FSR = 2 x V
REF
ADS803
R
1
5k
+1.5V
R
2
10k
4.5V
0.5V
IN
IN
+2.5V ext.
SEL
V
REF
1.24k
4.99k
0.1
μ
F
10
μ
F
REF1004
+2.5V
+
ADS803
+5V
V
IN
+2V
DC
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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