參數(shù)資料
型號(hào): ADS7806PB
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PDIP28
封裝: 0.300 INCH, GREEN, PLASTIC, DIP-28
文件頁(yè)數(shù): 19/25頁(yè)
文件大?。?/td> 670K
代理商: ADS7806PB
ADS7806
3
SBAS021B
www.ti.com
AC ACCURACY
Spurious-Free Dynamic Range
fIN = 1kHz, ±10V
80
90
dB(6)
Total Harmonic Distortion
fIN = 1kHz, ±10V
–90
–80
dB
Signal-to-(Noise + Distortion)
fIN = 1kHz, ±10V
70
73
72
dB
Signal-to-Noise
fIN = 1kHz, ±10V
70
73
72
dB
Usable Bandwidth(7)
130
kHz
Full-Power Bandwidth (–3dB)
600
kHz
SAMPLING DYNAMICS
Aperture Delay
40
ns
Aperture Jitter
20
ps
Transient Response
FS Step
5
s
Over-Voltage Recovery(8)
750
ns
REFERENCE
Internal Reference Voltage
No Load
2.48
2.5
2.52
V
Internal Reference Source Current
1
A
(Must use external buffer.)
Internal Reference Drift
8
ppm/
°C
External Reference Voltage Range
2.3
2.5
2.7
V
for Specified Linearity
External Reference Current Drain
External 2.5000V Ref
100
A
DIGITAL INPUTS
Logic Levels
VIL
–0.3
+0.8
V
VIH(9)
+2.0
VD +0.3V
V
IIL
VIL = 0V
±10
A
IIH
VIH = 5V
±10
A
DIGITAL OUTPUTS
Data Format
Data Coding
VOL
ISINK = 1.6mA
+0.4
V
VOH
ISOURCE = 500A+4
V
Leakage Current
High-Z State,
±5
A
VOUT = 0V to VDIG
Output Capacitance
High-Z State
15
pF
DIGITAL TIMING
Bus Access Time
RL = 3.3k, CL = 50pF
83
ns
Bus Relinquish Time
RL = 3.3k, CL = 10pF
83
ns
POWER SUPPLIES
Specified Performance
VDIG
Must be
≤ V
ANA
+4.75
+5
+5.25
V
VANA
+4.75
+5
+5.25
V
IDIG
0.6
mA
IANA
5.0
mA
Power Dissipation
VANA = VDIG = 5V, fS = 40kHz
28
35
mW
REFD HIGH
23
mW
PWRD and REFD HIGH
50
W
TEMPERATURE RANGE
Specified Performance
–40
+85
°C
Derated Performance
–55
+125
°C
Storage
–65
+150
°C
Thermal Resistance (
θ
JA)
DIP
75
°C/W
SO
75
°C/W
ELECTRICAL CHARACTERISTICS (Cont.)
At TA = –40°C to +85°C, fS = 40kHz, VDIG = VANA = +5V, and using internal reference and fixed resistors (see Figure 7b), unless otherwise specified.
ADS7806P, U
ADS7806PB, UB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Parallel 12-bits in 2-bytes; Serial
Binary Two’s Complement or Straight Binary
Specifications same as ADS7806 P, U.
NOTES: (1) LSB means Least Significant Bit. One LSB for the
±10V input range is 4.88mV. (2) Typical rms noise at worst-case transition. (3) As measured with
fixed resistors, see Figure 7b. Adjustable to zero with external potentiometer. (4) Full-scale error is the worst case of –Full-Scale or +Full-Scale untrimmed deviation
from ideal first and last code transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error. (5) This is the
time delay after the ADS7806 is brought out of Power-Down mode until all internal settling occurs and the analog input is acquired to rated accuracy. A Convert
command after this delay will yield accurate results. (6) All specifications in dB are referred to a full-scale input. (7) Usable bandwidth defined as full-scale input
frequency at which Signal-to-(Noise + Distortion) degrades to 60dB. (8) Recovers to specified performance after 2 FS input overvoltage. (9) The minimum VIH
level for the DATACLK signal is 3V.
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