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參數(shù)資料
| 型號(hào)： | ADS62C17IRGCR |
| 廠商： | Texas Instruments |
| 文件頁(yè)數(shù)： | 57/68頁(yè) |
| 文件大小： | 0K |
| 描述： | IC ADC 11BIT SRL/PAR 200M 64VQFN |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 11 |
| 采樣率（每秒）： | 200M |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 1.1W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 64-VQFN 裸露焊盤(pán)（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類(lèi)型： | 2 個(gè)差分，單極 |
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SINAD
1.76
ENOB =
6.02
-
(5)
10
S
N
P
THD = 10Log
P
(6)
(ExpressedindBc)
DVSUP
DVOUT
10
PSRR=20Log
(7)
(ExpressedindBc)
DVCM
DVOUT
10
CMRR=20Log
(8)
SLAS631A – APRIL 2009 – REVISED JULY 2009 ............................................................................................................................................................. www.ti.com
Total Harmonic Distortion (THD) – THD is the ratio of the power of the fundamental (PS) to the power of the
first nine harmonics (PD).
THD is typically given in units of dBc (dB to carrier).
Spurious-Free Dynamic Range (SFDR) – The ratio of the power of the fundamental to the highest other
spectral component (either spur or harmonic). SFDR is typically given in units of dBc (dB to carrier).
Two-Tone Intermodulation Distortion – IMD3 is the ratio of the power of the fundamental (at frequencies f1
and f2) to the power of the worst spectral component at either frequency 2f1–f2 or 2f2–f1. IMD3 is either given in
units of dBc (dB to carrier) when the absolute power of the fundamental is used as the reference, or dBFS (dB to
full scale) when the power of the fundamental is extrapolated to the converter’s full-scale range.
DC Power Supply Rejection Ratio (DC PSRR) – The DC PSSR is the ratio of the change in offset error to a
change in analog supply voltage. The DC PSRR is typically given in units of mV/V.
AC Power Supply Rejection Ratio (AC PSRR) – AC PSRR is the measure of rejection of variations in the
supply voltage by the ADC. If
ΔVSUP is the change in supply voltage and ΔVout is the resultant change of the
ADC output code (referred to the input), then
Voltage Overload Recovery – The number of clock cycles taken to recover to less than 1% error after an
overload on the analog inputs. This is tested by separately applying a sine wave signal with 6dB positive and
negative overload. The deviation of the first few samples after the overload (from their expected values) is noted.
Common Mode Rejection Ratio (CMRR) – CMRR is the measure of rejection of variation in the analog input
common-mode by the ADC. If
ΔVcm_in is the change in the common-mode voltage of the input pins and ΔVOUT
is the resultant change of the ADC output code (referred to the input), then
Cross-Talk (only for multi-channel ADC)– This is a measure of the internal coupling of a signal from adjacent
channel into the channel of interest. It is specified separately for coupling from the immediate neighboring
channel (near-channel) and for coupling from channel across the package (far-channel). It is usually measured
by applying a full-scale signal in the adjacent channel. Cross-talk is the ratio of the power of the coupling signal
(as measured at the output of the channel of interest) to the power of the signal applied at the adjacent channel
input. It is typically expressed in dBc.
60
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): ADS62C17
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| ADS62C17IRGCT | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual Channel 11B 200MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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