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參數(shù)資料
| 型號(hào)： | ADS-951MC |
| 廠商： | MURATA POWER SOLUTIONS INC |
| 元件分類(lèi)： | ADC |
| 中文描述： | 1-CH 18-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP32 |
| 封裝： | ROHS COMPLIANT, METAL SEALED, SIDE BRAZED, CERAMIC, TDIP-32 |
| 文件頁(yè)數(shù)： | 4/6頁(yè) |
| 文件大?。?/td> | 171K |
| 代理商： | ADS-951MC |
CALIBRATION PROCEDURE
Connect the converter per Table 1 for the appropriate input voltage range.
Any offset/gain calibration procedures should not be implemented until the
device is fully warmed up. To avoid interaction, adjust offset before gain.
The ranges of adjustment for the circuits in Figure 2 are guaranteed to
compensate for the ADS-951's initial accuracy errors and may not be able
to compensate for additional system errors.
A/D converters are calibrated by positioning their digital outputs exactly
on the transition point between two adjacent digital output codes. This is
accomplished by connecting LED's to the digital outputs and performing
adjustments until certain LED's "flicker" equally between on and off. Other
approaches employ digital comparators or microcontrollers to detect when
the outputs change from one code to the next.
For the ADS-951, offset adjusting is normally accomplished when the
analog input is 0 minus LSB (–19μV). See Table 2 for the proper bipolar
output coding.
Gain adjusting is accomplished when the analog input is at nominal full
scale minus 1LSB's (–4.999943V).
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input (pin 16) so that the
converter is continuously converting.
2. For bipolar zero/offset adjust, apply –19μV to the ANALOG INPUT (pin 4).
3. Adjust the offset potentiometer until the output code flickers equally be-
tween 01 1111 1111 1111 1111 and 10 0000 0000 0000 0000.
Gain Adjust Procedure
1. Apply –4.999943V to the ANALOG INPUT (pin 4).
2. Adjust the gain potentiometer until all output bits are 1's and the LSB flick-
ers between 1 and 0.
3. To confirm proper operation of the device, vary the applied input voltage to
obtain the output coding listed in Table 2.
Table 1. Input Connections
NPUT VOLTAGE
RANGE
ZERO ADJUST
(– LSB)
GAIN ADJUST
(–FS +1 LSB)
±5V
–19μV
–4.999943
COMPLEMENTARY OFFSET BINARY
INPUT RANGE
±5V
+4.999962
+3.750000
+2.500000
+0.000000
–2.500000
–3.750000
–4.999962
–5.000000
BIPOLAR
SCALE
+FS –1 LSB
+3/4 FS
+1/2 FS
0
–1/2 FS
–3/4 FS
–FS +1 LSB
–FS
OUTPUT CODING
MSB
00 0000 0000 0000 0000
00 0111 1111 1111 1111
00 1111 1111 1111 1111
01 1111 1111 1111 1111
10 1111 1111 1111 1111
11 0111 1111 1111 1111
11 1111 1111 1111 1110
11 1111 1111 1111 1111
LSB
Table 2. Output Coding
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-951 requires careful
attention to pc-card layout and power supply decoupling. The device's ana-
log and digital ground systems are not connected to each other internally.
For optimal performance, tie all ground pins (3, 12 and 13) directly to a
large
analog
ground plane beneath the package.
Bypass all power supplies and the +5V REFERENCE OUTPUT (pin 5) to
ground with 10μF tantalum capacitors in parallel with 0.1μF ceramic ca-
pacitors. Locate the bypass capacitors as close to the unit as possible. Tie a
47μF capacitor between COMPENSATION (pin 7) and ground.
2. The ADS-951 achieves its specified accuracies without the need for exter-
nal calibration. If required, the device's small initial errors can be reduced
to zero using the adjustment circuitry shown in Figure 2. When using this
circuitry, or any similar offset and gain calibration hardware, make adjust-
ments following warmup. To avoid interaction, always adjust offset before
gain. Float pin 6 if not using gain adjust circuits.
3. Applying a start convert pulse while a conversion is in progress (EOC =
logic "1") will initiate a new and probably inaccurate conversion cycle. Data
for the interrupted and subsequent conversions will be invalid.
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and speci-
fied over operating temperature (case) ranges of 0 to +70°C and –40
to +110°C. All room-temperature (TA = +25°C) production testing is
performed without the use of heat sinks or forced-air cooling. Thermal
impedance figures for each device are listed in their respective specifica-
tion tables.
These devices do not normally require heat sinks, however, standard pre-
cautionary design and layout procedures should be used to ensure devices
do not overheat. The ground and power planes beneath the package, as
well as all pcb signal runs to and from the device, should be as heavy
as possible to help conduct heat away from the package. Electrically-
insulating, thermally-conductive "pads" may be installed underneath the
package. Devices should be soldered to boards rather than "socketed", and
of course, minimal air flow over the surface can greatly help reduce the
package temperature.
ADS-951
18-Bit, 1MHz, Low-Power Sampling A/D Converters
DATEL
11 Cabot Boulevard, Mansfield, MA 02048-1151 USA Tel: (508) 339-3000 www.datel.com e-mail: help@datel.com
01 Apr 2011 MDA_ADS-951.B02
Page 4 of 6
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS-951ME | 制造商:Murata Power Solutions 功能描述:Dual ADC 2-Step Flash 1Msps 18-bit Parallel 32-Pin TDIP |
| ADS953 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:18-Bit, 1MHz, Low-Distortion Sampling A/D Converters |
| ADS-953 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:18-Bit, 1MHz, Low-Distortion Sampling A/D Converters |
| ADS-953MC | 制造商:Murata Power Solutions 功能描述:Dual ADC 2-Step Flash 1Msps 18-bit Parallel 32-Pin TDIP |
| ADS-953ME | 制造商:Murata Power Solutions 功能描述:Dual ADC 2-Step Flash 1Msps 18-bit Parallel 32-Pin TDIP |
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