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參數(shù)資料
| 型號： | ADS-119MC |
| 廠商： | CD TECHNOLOGIES INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 12-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP24 |
| 封裝： | METAL SEALED, CERAMIC, DDIP-24 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 147K |
| 代理商： | ADS-119MC |
ADS-119
3
+25°C
0 to +70°C
–55 to +125°C
DIGITAL OUTPUTS
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
UNITS
Logic Levels
Logic "1"
+2.4
—
+2.4
—
+2.4
—
Volts
Logic "0"
—
+0.4
—
+0.4
—
+0.4
Volts
Logic Loading "1"
—
–4
—
–4
—
–4
mA
Logic Loading "0"
—
+4
—
+4
—
+4
mA
Output Coding
Offset Binary
POWER REQUIREMENTS
Power Supply Ranges
+5V Supply
+4.75
+5.0
+5.25
+4.75
+5.0
+5.25
+4.9
+5.0
+5.25
Volts
–5V Supply
–4.75
–5.0
–5.25
–4.75
–5.0
–5.25
–4.9
–5.0
–5.25
Volts
Power Supply Current
+5V Supply
—
+200
+215
—
+200
+215
—
+200
+215
mA
–5V Supply
—
–180
–205
—
–180
–205
—
–180
–205
mA
Power Dissipation
—
1.8
2.1
—
1.8
2.1
—
1.8
2.1
Watts
Power Supply Rejection
—
±0.01
—
±0.01
—
±0.01
%FSR/%V
Figure 2. ADS-119 Timing Diagram
6.02
(SNR + Distortion) – 1.76 +
20 log
Full Scale Amplitude
Actual Input Amplitude
Effective bits is equal to:
This is the time required before the A/D output data is valid after the analog input
is back within the specified range.
Footnotes:
All power supplies must be on before applying a start convert pulse. All supplies
and the clock (START CONVERT) must be present during warmup periods. The
device must be continuously converting during this time. There is slight
degradation in performance when using ±12V supplies.
See ordering information for availability of ±5V input range. Contact DATEL for
availability of other input voltage ranges.
A 200ns wide start convert pulse is used for all production testing. Only the rising
edge of the start convert pulse is required for the device to operate
(edge-triggered).
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-119
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For optimal
performance, tie all ground pins (14, 18, and 23) directly to
a large analog ground plane beneath the package.
Bypass all power supplies to ground with 4.7F tantalum
capacitors in parallel with 0.1F ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2. The ADS-119 achieves its specified accuracies without the
need for external calibration. If required, the device's small
initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figures 3 and 4. For
operation without adjustment, tie pin 17 to analog ground.
When using this circuitry, or any similar offset and gain-
calibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.
3. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle.
4. Data is valid only for the time period (55ns, typical) shown in
Figure 2 even if the device is sampling at less than 10MHz.
START
CONVERT
DATA
INTERNAL S/H
N
N+1
DATA N-1 VALID
55ns typ.
50ns typ.
Acquisition Time
30ns min.
35ns typ.
37ns max.
Hold
65ns typ.
10ns typ.
DATA N VALID
INVALID DATA
45ns typ.
Scale is approximately 5ns per division.
INTERNAL EOC
15ns typ.
Conversion Time
DATA
VALID
40ns typ.
±5ns
35ns typ.
INVALID DATA
10ns typ.
INVALID DATA
Hold
40ns typ.
±5ns
60ns typ.
72ns min.
80ns typ.
83ns max.
20ns typ.
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