參數(shù)資料
型號: ADR380
廠商: Analog Devices, Inc.
英文描述: Precision Low-Drift 2.048 V/2.500 V SOT-23 Voltage References
中文描述: 精密低漂移2.048 V/2.500 V SOT - 23封裝電壓基準
文件頁數(shù): 10/12頁
文件大小: 316K
代理商: ADR380
REV. A
–10–
ADR380/ADR381
THEORY OF OPERATION
Band gap references are the high performance solution for low
supply voltage and low power voltage reference applications,
and the ADR380/ADR381 are no exception. But the unique-
ness of this product lies in its architecture. By observing Figure
1, the ideal zero TC band gap voltage is referenced to the
output, not to ground. The band gap cell consists of the PNP
pair Q51 and Q52, running at unequal current densities. The
difference in V
BE
results in a voltage with a positive TC which is
amplified up by the ratio of 2
×
R58/R54. This PTAT voltage,
combined with V
BEs
of Q51 and Q52, produce the stable band
gap voltage. Reduction in the band gap curvature is performed
by the ratio of the two resistors R44 and R59. Precision laser
trimming and other patented circuit techniques are used to
further enhance the drift performance.
GND
V
OUT
V
IN
Q1
R59
R54
Q51
R60
R61
R48
R49
R44
R58
R53
Q52
+
Figure 1. Simplified Schematic
Device Power Dissipation Considerations
The ADR380/ADR381 are capable of delivering load currents
to 5 mA with an input voltage that ranges from 2.8 V (ADR381
only) to 15 V. When this device is used in applications with
large input voltages, care should be taken to avoid exceeding the
specified maximum power dissipation or junction temperature
that could result in premature device failure. The following
formula should be used to calculate a device’s maximum junc-
tion temperature or dissipation:
P
T
T
D
A
A
=
J
J
θ
where:
P
D
is the device power dissipation,
T
J
and
T
A
are junction and ambient temperatures,
respectively, and
θ
J
A
is the device package thermal resistance.
Input Capacitor
Input capacitor is not required on the ADR380/ADR381. There
is no limit for the value of the capacitor used on the input, but a
capacitor on the input will improve transient response in appli-
cations where the load current suddenly increases.
Output Capacitor
The ADR380/ADR381 do not need an output capacitor for
stability under any load condition. An output capacitor, typically
0.1
μ
F, will take out any very low level noise voltage, and will
not affect the operation of the part. The only parameter that will
degrade by putting an output capacitor here is turn-on time.
(This will vary depending on the size of the capacitor.) Load
transient response is also improved with an output capacitor. A
capacitor will act as a source of stored energy for a sudden in-
crease in load current.
APPLICATIONS
Stacking Reference ICs for Arbitrary Outputs
Some applications may require two reference voltage sources
which are a combined sum of standard outputs. The following
circuit shows how this
stacked output
reference can be imple-
mented:
GND
3
V
OUT
U2
ADR380/
ADR381
V
IN
C1
0.1 F
GND
3
V
OUT
U1
ADR380/
ADR381
V
IN
C3
0.1 F
C2
1 F
C4
1 F
R1
3.9k
V
OUT2
V
OUT1
2
2
1
1
V
IN
Figure 2. Stacking Voltage References with the
ADR380/ADR381
Two ADR380s or ADR381s are used; the outputs of the indi-
vidual references are simply cascaded to reduce the supply
current. Such configuration provides two output voltages—
V
OUT1
and V
OUT2
. V
OUT1
is the terminal voltage of U1, while
V
OUT2
is the sum of this voltage and the terminal voltage of U2.
U1 and U2 can be chosen for the two different voltages that
supply the required outputs.
While this concept is simple, a precaution is in order. Since the
lower reference circuit must sink a small bias current from U2,
plus the base current from the series PNP output transistor in
U2, the external load of either U1 or R1 must provide a path for
this current. If the U1 minimum load is not well-defined, the
resistor R1 should be used, set to a value that will conservatively
pass 600
μ
A of current with the applicable V
OUT1
across it. Note
that the two U1 and U2 reference circuits are locally treated as
macrocells, each having its own bypasses at input and output for
optimum stability. Both U1 and U2 in this circuit can source dc
currents up to their full rating. The minimum input voltage, V
S
,
is determined by the sum of the outputs, V
OUT2
, plus the
300 mV dropout voltage of U2.
A Negative Precision Reference Without Precision Resistors
In many current-output CMOS DAC applications where the
output signal voltage must be of the same polarity as the refer-
ence voltage, it is often required to reconfigure a current-switching
DAC into a voltage-switching DAC through the use of a 1.25 V
reference, an op amp, and a pair of resistors. Using a current-
switching DAC directly requires an additional operational
amplifier at the output to reinvert the signal. A negative voltage
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