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參數資料
| 型號： | ADP3162 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 5-Bit Programmable 2-Phase Synchronous Buck Controller |
| 中文描述： | 5位可編程2相同步降壓控制器 |
| 文件頁數： | 9/12頁 |
| 文件大?。?/td> | 151K |
| 代理商： | ADP3162 |
REV. A
ADP3162
–6–
Cycle-by-Cycle Operation
During normal operation (when the output voltage is regulated),
the voltage-error amplier and the current comparator are the
main control elements. The voltage at the CT pin of the oscilla-
tor ramps between 0 V and 3 V. When that voltage reaches 3 V,
the oscillator sets the driver logic, which sets PWM1 high. Dur-
ing the ON time of Phase 1, the driver IC turns on the high-side
MOSFET. The CS+ and CS– pins monitor the current through
the sense resistor that feeds both high-side MOSFETs. When
the voltage between the two pins exceeds the threshold level
set by the voltage error amplifier (gm), the driver logic is reset
and the PWM output goes low. This signals the driver IC to turn
off the high-side MOSFET and turn on the low-side MOSFET.
On the next cycle of the oscillator, the driver logic toggles and
sets PWM2 high. On each following cycle of the oscillator, the
outputs toggle between PWM1 and PWM2. In each case, the
current comparator resets the PWM output low when the current
comparator threshold is reached. As the load current increases,
the output voltage starts to decrease. This causes an increase in
the output of the gm amplier, which in turn leads to an increase
in the current comparator threshold, thus programming more
current to be delivered to the output so that voltage regulation is
maintained.
Active Current Sharing
The ADP3162 ensures current balance in the two phases by
actively sensing the current through a single sense resistor. During
one phase’s ON time, the current through the respective high-side
MOSFET and inductor is measured through the sense resistor
(R4 in Figure 2). When the comparator (CMP1 in the Functional
Block Diagram) threshold programmed by the gm amplifier is
reached, the high-side MOSFET turns off. In the next cycle the
ADP3162 switches to the second phase. The current is measured
with the same sense resistor and the same internal comparator,
ensuring accurate matching. This scheme is immune to imbalances
in the MOSFETs’ RDS(ON) and inductors’ parasitic resistances.
If for some reason one of the phases fails, the other phase will still
be limited to its maximum output current (one-half of the short
circuit current limit). If this is not sufcient to supply the load,
the output voltage will droop and cause the PWRGD output to
signal that the output voltage has fallen out of its specied range.
Short Circuit Protection
The ADP3162 has multiple levels of short circuit protection to
ensure fail-safe operation. The sense resistor and the maximum
current sense threshold voltage given in the specications set the
peak current limit.
When the load current exceeds the current limit, the excess current
discharges the output capacitor. When the output voltage is below
the foldback threshold VFB(LOW), the maximum deliverable output
current is cut by reducing the current sense threshold from the
current limit threshold, VCS(CL), to the foldback threshold,
VCS(FOLD). Along with the resulting current foldback, the oscilla-
tor frequency is reduced by a factor of five when the output is
0 V. This further reduces the average current in short circuit.
Power-Good Monitoring
The Power-Good comparator monitors the output voltage of the
supply via the FB pin. The PWRGD pin is an open drain output
whose high level (when connected to a pull-up resistor) indi-
cates that the output voltage is within the specified range of
the nominal output voltage requested by the VID DAC. PWRGD
will go low if the output is outside this range.
Output Crowbar
The ADP3162 includes a crowbar comparator that senses when
the output voltage rises higher than the specified trip thresh-
old, VCROWBAR. This comparator overrides the control loop and
sets both PWM outputs low. The driver ICs turn off the high side
MOSFETs and turn on the low-side MOSFETs, thus pulling the
output down as the reversed current builds up in the inductors. If
the output overvoltage is due to a short of the high side MOSFET,
this action will current limit the input supply or blow its fuse,
1
2
3
4
8
7
6
5
BST
IN
DLY
VCC
DRVH
SW
PGND
DRVL
U2
ADP3412
U1
ADP3162
RB
19.1k
1%
RA
10.1k
1%
COC
3.3nF
VCC(CORE)
1.7V
30A
VCC(CORE)RTN
C19
C18
C17
C29
1000 F
8
RUBYCON ZA SERIES
24m
ESR (EACH)
C16
C20 C27 C28
D1
MBR052LTI
Q5
FMMT18
L2
1 H
L1
1 H
Q2
IRL3803
C10
1 F
D2
MBR052LTI
C7
15pF
C5
1 F
Z1
ZMM5236BCT
R5
2.4k
R8
330
C23
330pF
C22 1nF
C4
4.7 F
R6
10
C21
15nF
C13
C12
VIN 5V
VIN RTN
C26
4.7 F
C8
15pF
C6
1 F
C9
1 F
R7
20
R4
4m
C2
100pF
C1
91pF
R1
1k
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VID3
VID2
VID1
VID0
VID25
COMP
FB
CT
VCC
REF
CS–
PWM1
PWM2
CS+
PWRGD
GND
1
2
3
4
8
7
6
5
BST
IN
DLY
VCC
DRVH
SW
PGND
DRVL
U3
ADP3412
FROM
CPU
Q4
IRL3803
12V VCC
++
+
C14
C15
Q3
IRL3803
Q1
IRL3803
1000 F
4
Figure 2. 23 A Pentium III CPU Supply Circuit
Pentium is a registered trademark of Intel Corporation.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADP3162JR | 制造商:Rochester Electronics LLC 功能描述:5-BIT PROGRMBLE 2PHASE SYNC. BCK. CNTRLR - Bulk 制造商:Analog Devices 功能描述: |
| ADP3162JR-REEL | 功能描述:IC REG BUCK 5BIT 2PHASE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,000 系列:- 應用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數:10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應商設備封裝:42-WLP 包裝:帶卷 (TR) |
| ADP3162JR-REEL7 | 制造商:Rochester Electronics LLC 功能描述:5-BIT PROGRMBLE 2PHASE SYNC. BCK. CNTRLR - Tape and Reel |
| adp3162jrz | 制造商:Rochester Electronics LLC 功能描述:5-BIT PROGRMBLE 2PHASE SYNC. BCK. CNTRLR - Bulk 制造商:Analog Devices 功能描述: |
| ADP3162JRZ-REEL7 | 功能描述:IC REG BUCK 5BIT 2PHASE 16-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標準包裝:2,000 系列:- 應用:控制器，DSP 輸入電壓:4.5 V ~ 25 V 輸出數:2 輸出電壓:最低可調至 1.2V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:30-TFSOP（0.173"，4.40mm 寬） 供應商設備封裝:30-TSSOP 包裝:帶卷 (TR) |
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