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參數(shù)資料
| 型號(hào)： | ADP3011 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Programmable Synchronous Switching Regulator Controller(用于PⅡ處理器的5位可編程同步開關(guān)穩(wěn)壓控制器) |
| 中文描述： | 可編程同步開關(guān)穩(wěn)壓器控制器（用于PⅡ處理器的5位可編程同步開關(guān)穩(wěn)壓控制器） |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 180K |
| 代理商： | ADP3011 |
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADP3011
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1998
5-Bit Programmable Synchronous
Switching Regulator Controller
for Pentium
II Processor
FEATURES
5-Bit Digitally Programmable 1.8 V to 3.5 V Output
Voltage
Dual N-Channel Synchronous Driver
High Efficiency
Current-Mode Operation
Short Circuit Protection
Power Good Output
Integrated Overvoltage Protection Crowbar
16-Lead SOIC Package
VRM 8.2 Compatible
APPLICATIONS
Desktop PC Power Supply for:
Pentium II Processor
Pentium Pro Processor
Pentium Processor
AMD–K6 Processor
VRM Modules
GENERAL DESCRIPTION
The ADP3011 is a highly efficient synchronous switching regu-
lator controller optimized for Pentium II Processor applications
where 5 V is stepped down to a digitally controlled output volt-
age between 1.8 V and 3.5 V. Using a 5-bit DAC to read a
voltage identification (VID) code directly from the processor,
the ADP3011 uses a current-mode constant off-time architec-
ture to generate its precise output voltage.
V
CC
SD
DRIVE1
SENSE+
SENSE–
DRIVE2
PGND
VID0–VID4
AGND
C
T
CMP
V
CC
+12V
1
m
F
22
m
F
R1
R2
150pF
5-BIT CODE
IRL3103
V
IN
+5V
+C
IN
10BQ015
L
2.5
m
H
IRL3103
+C
O
V
1.8V–3.5V
14A
R
6.7m
V
1nF
ADP3011
C
COMP
Figure 1. Typical Application
Pentium is a registered trademark of Intel Corporation.
All other trademarks are the property of their respective holders.
FUNCTIONAL BLOCK DIAGRAM
g
m
NONOVERLAP
DRIVE
IN
CROWBAR
12
14
13
15
SD
V
CC
DRIVE1 DRIVE2 PGND
V
REF
+ 15%
11
5
AGND
PWRGD
SENSE+
DELAY
V
REF
+ 5% V
REF
– 5%
7
SENSE–
2R
ADP3011
CMPI
DAC
CMP
1.20V
16
VID0
1
VID1
2
3
VID3
4
VID4
V
REF
V
T1
CMPT
V
T2
9
C
T
OFF-TIME
CONTROL
SENSE–
6
8
REFERENCE
R
10
S
R
Q
The ADP3011 drives two synchronous N-channel MOSFETS
at a switching frequency of 250 kHz. The constant off-time
architecture maintains constant inductor ripple current while
current-mode operation provides excellent line and load tran-
sient response. The operating current level is user program-
mable via an external current sense resistor.
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