參數(shù)資料
型號(hào): ADNS-3080
英文描述: High-performance Optical Mouse Sensor
中文描述: 高性能的光學(xué)鼠標(biāo)傳感器
文件頁(yè)數(shù): 22/40頁(yè)
文件大小: 530K
代理商: ADNS-3080
22
Notes on Power-up and the serial
port
Reset Circuit
The ADNS-3080 does not
perform an internal power up
self-reset. The reset pin must
be raised and lowered to reset
the chip. This should be done
every time power is applied.
During power-up there will be
a period of time after the
power supply is high but
before any clocks are available.
The table below shows the
state of the various pins
during power-up and reset
when the RESET pin is driven
high by a micro-controller.
Power Down Circuit
The following table lists the
pin states during power down.
The chip is put into the power
down (PD) mode by lowering
the NPD input. When in PD
mode, the oscillator is stopped
but all register contents are
retained. To achieve the
lowest current state, all inputs
must be held externally within
200mV of a rail, either ground
or V
DD3
. The chip outputs are
driven low or hi-Z during PD
to prevent current
consumption by an external
load.
LED Drive Mode
The LED has 2 modes of
operation: DC and Shutter. In
DC mode it is on at all times
the chip is powered except
when in the power down mode
via the NPD pin. In shutter
mode the LED is on only
during the portion of the
frame that light is required.
The LED_MODE bit in the
Configuration_bits register sets
the LED mode.
State of Signal Pins After VDD is Valid
Pin
Before Reset
SPI pullups
Undefined
NCS
Hi-Z control
functional
MISO
Driven or hi-Z
(per NCS)
SCLK
Undefined
MOSI
Undefined
LED_CTRL
Undefined
RESET
Functional
During Reset
Off
Hi-Z control
functional
Driven or hi-Z
(per NCS)
Ignored
Ignored
Low
High
(externally driven)
Ignored
After Reset
On (default)
Functional
Low or hi-Z
(per NCS)
Functional
Functional
High
Functional
NPD
Undefined
Functional
State of Signal Pins During Power Down
Pin
NPD low
SPI pullups
off
NCS
hi-Z control functional
MISO
low or hi-Z (per NCS)
SCLK
ignored
MOSI
ignored
LED_CTRL
low
RESET
functional
NPD
low (driven externally)
REFC
V
DD3
OSC_IN
low
OSC_OUT
high
After wake from PD
pre-PD state
functional
pre-PD state or hi-Z
functional
functional
high
functional
functional
REFC
OSC_IN
OSC_OUT
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