VCC 14 NC 13 A 12 B 11 DI 5 GND 6 GND 7 Z 10 " />
參數(shù)資料
型號(hào): ADM489ABRZ-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 14/16頁(yè)
文件大?。?/td> 0K
描述: IC TXRX RS485/422 DIFF 14SOIC
標(biāo)準(zhǔn)包裝: 1,000
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: RS422,RS485
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOICN
包裝: 帶卷 (TR)
ADM488A/ADM489A
Rev. A | Page 7 of 16
NC
1
RO
2
RE
3
DE
4
VCC
14
NC
13
A
12
B
11
DI
5
GND
6
GND
7
Z
10
Y
9
NC
8
NC = NO CONNECT
ADM489A
TOP VIEW
(Not to Scale)
08498-
004
Figure 4. ADM489A SOIC_N Pin Configuration
1
2
3
4
5
10
9
8
7
6
RE
DE
DI
GND
RO
A
B
Z
Y
VCC
ADM489A
TOP VIEW
(Not to Scale)
08498-
005
Figure 5. ADM489A MSOP Pin Configuration
Table 5. ADM489A Pin Function Descriptions
Pin No.
Mnemonic
Description
SOIC_N
MSOP
1, 8, 13
N/A1
NC
No Connect. No connections are required to this pin.
2
1
RO
Receiver Output. When enabled, if A > B by 200 mV, RO = high. If A < B by 200 mV, RO = low.
3
2
RE
Receiver Output Enable. A low level enables the receiver output, RO. A high level places the
ADM489A in a high impedance state.
4
3
DE
Driver Output Enable. A high level enables the driver differential outputs (Y and Z). A low level
places the ADM489A in a high impedance state.
5
4
DI
Driver Input. When the driver is enabled, a logic low on DI forces Y low and Z high, whereas a
logic high on DI forces Y high and Z low.
6, 7
5
GND
Ground Connection, 0 V.
9
6
Y
Noninverting Driver, Differential Output Y.
10
7
Z
Inverting Driver, Differential Output Z.
11
8
B
Inverting Receiver, Input B.
12
9
A
Noninverting Receiver, Input A.
14
10
VCC
Power Supply, 5 V ± 10%.
1
N/A means not applicable.
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