VCC = 3.3 V, T
參數(shù)資料
型號(hào)： ADM3493ARZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 7/12頁(yè)
文件大?。?/td> 0K
描述： IC TXRX RS-422/485 3.3V 8-SOIC
標(biāo)準(zhǔn)包裝： 1,000
類(lèi)型： 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 1/1
規(guī)程： RS422，RS485
電源電壓： 3 V ~ 3.6 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SO
包裝： 帶卷 (TR)
ADM3493
Rev. 0 | Page 4 of 12
TIMING SPECIFICATIONS
VCC = 3.3 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Min
Typ
Max
Units
Test Conditions/Comments
DRIVER
Differential Output Delay, tDD
600
900
1400
ns
RL = 60 Ω
Differential Output Transition Time, tTD
400
700
1200
ns
RL = 60 Ω
(see Figure 6 and Figure 12)
Propagation Delay, Low-to-High Level, tPLH
700
1000
1500
ns
RL = 27 Ω
Propagation Delay, High-to-Low Level, tPHL
700
1000
1500
ns
RL = 27 Ω
|tPLH – tPHL| Propagation Delay Skew1, tPDS
100
ns
RL = 27 Ω (see Figure 7 and Figure 13)
DRIVER OUTPUT ENABLE/DISABLE TIMES
Output Enable Time to Low Level, tPZL
900
1300
ns
RL = 110 Ω
Output Enable Time to High Level, tPZH
600
800
ns
RL = 110 Ω
Output Disable Time from High Level, tPHZ
50
80
ns
RL = 110 Ω
Output Disable Time from Low Level, tPLZ
50
80
ns
RL = 110 Ω
Output Enable Time from Shutdown to
Low Level, tPSL
1.9
2.7
μs
RL = 110 Ω
Output Enable Time from Shutdown to
High Level, tPSH
2.2
3.0
μs
RL = 110 Ω
RECEIVER
Time to Shutdown2, tSHDN
80
190
300
ns
Propagation Delay, Low-to-High Level, tRPLH
25
75
180
ns
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 10
Propagation Delay, High-to-Low Level, tRPHL
25
75
180
ns
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 10
|tPLH – tPHL| Propagation Delay Skew, tRPDS
50
ns
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 10
RECEIVER OUTPUT ENABLE/DISABLE TIMES
Output Enable Time to Low Level, tPRZL
25
50
ns
CL = 15 pF (see Figure 11 and Figure 17)
Output Enable Time to High Level, tPRZH
25
50
ns
CL = 15 pF (see Figure 11 and Figure 17)
Output Disable Time from High Level, tPRHZ
25
45
ns
CL = 15 pF (see Figure 11 and Figure 17)
Output Disable Time from Low Level, tPRLZ
25
45
ns
CL = 15 pF (see Figure 11 and Figure 17)
Output Enable Time from Shutdown to
Low Level, tPRSL
720
1400
ns
CL = 15 pF (see Figure 11 and Figure 17)
Output Enable Time from Shutdown to
High Level, tPRSH
720
1400
ns
CL = 15 pF (see Figure 11 and Figure 17)
1 Measured on |tPLH (A) tPHL (A)| and |tPLH (B) tPHL (B)|.
2 The transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 80 ns, the parts are guaranteed not to enter
shutdown. If the inputs are in this state for at least 300 ns, the parts are guaranteed to enter shutdown.
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