RO
參數(shù)資料
型號(hào)： ADM3491AR
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 19/20頁(yè)
文件大?。?/td> 0K
描述： IC TX/RX RS-485 HS 3.3V 14SOIC
標(biāo)準(zhǔn)包裝： 56
類型： 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 1/1
規(guī)程： RS422，RS485
電源電壓： 3 V ~ 3.6 V
安裝類型： 表面貼裝
封裝/外殼： 14-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 14-SOICN
包裝： 管件
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
Data Sheet
Rev. E | Page 8 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
RO 1
RE 2
DE 3
DI 4
VCC
8
B
7
A
6
GND
5
ADM3483/
ADM3485
TOP VIEW
(Not to Scale)
05
52
4-
02
8
Figure 4. ADM3483/ADM3485 Pin Configuration
VCC 1
RO 2
DI 3
GND 4
A
8
B
7
Z
6
Y
5
ADM3488/
ADM3490
TOP VIEW
(Not to Scale)
05
52
4-
02
9
Figure 5. ADM3488/ADM3490 Pin Configuration
NC 1
RO 2
RE 3
DE 4
VCC
14
VCC
13
A
12
B
11
DI 5
Z
10
GND 6
Y
9
GND 7
NC
8
NC = NO CONNECT
ADM3491
TOP VIEW
(Not to Scale)
05
52
4-
0
30
Figure 6. ADM3491 Pin Configuration
Table 7. Pin Function Descriptions
ADM3483/
ADM3485 Pin No.
ADM3488/
ADM3490 Pin No.
ADM3491
Pin No.
Mnemonic
Description
1
2
RO
Receiver Output. When enabled, if A > B by 200 mV, then RO =
high. If A < B by 200 mV, then RO = low.
2
Not applicable
3
RE
Receiver Output Enable. A low level enables the receiver output,
RO. A high level places it in a high impedance state. If RE is high
and DE is low, the device enters a low power shutdown mode.
3
Not applicable
4
DE
Driver Output Enable. A high level enables the driver differential
Output A and Output B. A low level places it in a high impedance
state. If RE is high and DE is low, the device enters a low power
shutdown mode.
4
3
5
DI
Driver Input. With a half-duplex part when the driver is enabled, a
logic low on DI forces A low and B high while a logic high on DI
forces A high and B low. With a full-duplex part when the driver is
enabled, a logic low on DI forces Y low and Z high while a logic
high on DI forces Y high and Z low.
5
4
6, 7
GND
Ground.
Not applicable
5
9
Y
Noninverting Driver Output.
Not applicable
6
10
Z
Inverting Driver Output.
6
Not applicable
A
Noninverting Receiver Input A and Noninverting Driver Output A.
Not applicable
8
12
A
Noninverting Receiver Input A.
7
Not applicable
B
Inverting Receiver Input B and Inverted Driver Output B.
Not applicable
7
11
B
Inverting Receiver Input B.
8
1
13, 14
VCC
Power Supply (3.3 V ± 0.3 V).
Not applicable
1, 8
NC
No Connect.
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