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參數(shù)資料
| 型號： | ADM3232EARNZ-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Single Supply RS232C Line Driver/Receiver(?????μ?o?RS232C ?o?????????¨???2???2??????) |
| 中文描述： | DUAL LINE TRANSCEIVER, PDSO16 |
| 封裝： | ROHS COMPLIANT, MS-012AC, SOIC-16 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 220K |
| 代理商： | ADM3232EARNZ-REEL7 |
ADM3232E
THEORY OF OPERATION
The ADM3232E is a single-channel RS-232 line driver/receiver.
Step-up voltage converters, coupled with level-shifting transmitters
and receivers, allow RS-232 levels to be developed while operating
from a single 3.3 V supply.
CMOS technology is used to keep the power dissipation to an
absolute minimum, allowing maximum battery life in portable
applications.
CIRCUIT DESCRIPTION
The internal circuitry consists of the following main sections:
A charge pump voltage converter
A 3.3 V logic to RS-232 transmitter
An RS-232 to 3.3 V logic receiver
Charge Pump DC-DC Voltage Converter
The charge pump voltage converter consists of a 200 kHz
oscillator and a switching matrix. The converter generates a
±6.6 V supply from the input 3.3 V level. This is done in two
stages by using a switched capacitor technique as shown in
Figure 10. First, the 3.3 V input supply is doubled to 6.6 V by
using Capacitor C1 as the charge storage element. The +6.6 V
level is then inverted to generate 6.6 V, using C2 as the storage
element. C3 is shown connected between V+ and V
CC
, but it is
equally effective if connected between V+ and GND.
Capacitor C3 and Capacitor C4 are used to reduce the output
ripple. Their values are not critical and can be increased, if desired.
Capacitor C3 is shown connected between V+ and V
CC
. It is also
acceptable to connect this capacitor between V+ and GND.
If desired, larger capacitors (up to 10 μF) can be used for
Capacitor C1 to Capacitor C4.
Rev. 0 | Page 8 of 12
C1+
C1–
C2+
C2–
V
CC
V+
V–
T1
IN
T1
OUT
T2
IN
T2
OUT
R1
OUT
R1
IN
R2
OUT
R2
IN
TTL/CMOS
INPUTS
RS-232
OUTPUTS
TTL/CMOS
OUTPUTS
RS-232
INPUTS*
T1
T2
R1
R2
+
+
+
0.1μF
10V
0.1μF
10V
GND
ADM3232E
C3
0.1μF
6.3V
+3.3V INPUT
+3.3V TO +6.6V
VOLTAGE
DOUBLER
+6.6V TO –6.6V
VOLTAGE
INVERTER
C5
0.1μF
+
C4
0.1μF
10V
+
*INTERNAL 5k
PULL-DOWN RESISTOR
ON EACH RS-232 INPUT.
Figure 10. Typical Operating Circuit
5k
5k
0
C1
+
C3
+
S3
S4
S1
S2
INTERNAL
OSCILLATOR
V
CC
GND
V
CC
V+ = 2V
CC
0
Figure 11. Charge Pump Voltage Doubler
C2
+
C4
+
S3
S4
S1
S2
INTERNAL
OSCILLATOR
V+
GND
V– = –(V+)
GND
FROM
VOLTAGE
DOUBLER
0
Figure 12. Charge Pump Voltage Inverter
Transmitter (Driver) Section
The drivers convert 3.3 V logic input levels into RS-232 output
levels. With V
CC
= 3.3 V and driving an RS-232 load, the output
voltage swing is typically ±6 V.
Receiver Section
The receivers are inverting level-shifters that accept RS-232 input
levels and translate them into 3 V logic output levels. The inputs
have internal 5 kΩ pull-down resistors to ground and are also
protected against overvoltages up to ±30 V. Unconnected inputs
are pulled to 0 V by the internal 5 kΩ pull-down resistor. This
results in a Logic 1 output level for unconnected inputs or for
inputs connected to GND.
The receivers have Schmitt trigger inputs with a hysteresis level
of 0.4 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times.
ESD Protection on RS-232 and TTL/CMOS I/O Pins
All RS-232 (T_
OUT
and R_
IN
) and TTL/CMOS (T_
IN
and R_
OUT
)
inputs and outputs are protected against electrostatic discharges
(up to ±15 kV). This ensures compliance with IEC 1000-4-2
requirements.
HIGH BAUD RATE
The ADM3232E features high slew rates, permitting data trans-
mission at rates well in excess of the EIA-232E specifications.
RS-232 voltage levels are maintained at data rates up to 460 kbps,
even under worst-case loading conditions. This allows high
speed data links between two terminals and is suitable for the
new generation ISDN modem standards that require data rates
of 230 kbps. The slew rate is internally controlled to less than
30 V/μs to minimize EMI interference.
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相關代理商/技術參數(shù) |
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|---|---|
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