參數(shù)資料
型號: ADM3078EYRZ
廠商: Analog Devices Inc
文件頁數(shù): 17/20頁
文件大?。?/td> 0K
描述: IC TXRX RS-485 3V HD 8SOIC
標(biāo)準(zhǔn)包裝: 98
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: RS422,RS485
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
產(chǎn)品目錄頁面: 790 (CN2011-ZH PDF)
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 6 of 20
TIMING SPECIFICATIONS—ADM3073E/ADM3074E/ADM3075E
VCC = 3.3 V ± 10%, TA = TMIN to TMAX, unless otherwise noted.
Table 4.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
DRIVER
Maximum Data Rate
500
kbps
Propagation Delay, Low-to-High Level
tDPLH
180
800
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Propagation Delay, High-to-Low Level
tDPHL
180
800
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Rise Time/Fall Time
tDR/tDF
200
800
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
|tDPLH tDPHL| Differential Driver Output Skew
tDSKEW
100
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Enable to Output High
tDZH
2500
ns
Enable to Output Low
tDZL
2500
ns
Disable Time from Low
tDLZ
100
ns
Disable Time from High
tDHZ
100
ns
Enable Time from Shutdown to High
tDZH(SHDN)
4500
ns
Enable Time from Shutdown to Low
tDZL(SHDN)
4500
ns
RECEIVER
Maximum Data Rate
500
kbps
Propagation Delay, Low-to-High Level
tRPLH
200
ns
CL = 15 pF (see Figure 12 and Figure 13)
Propagation Delay, High-to-Low Level
tRPHL
200
ns
CL = 15 pF (see Figure 12 and Figure 13)
|tRPLH tRPHL| Output Skew
tRSKEW
30
ns
CL = 15 pF (see Figure 12 and Figure 13)
Enable to Output High
tRZH
50
ns
Enable to Output Low
tRZL
50
ns
Disable Time from Low
tRLZ
50
ns
Disable Time from High
tRHZ
50
ns
Enable Time from Shutdown to High
tRZH(SHDN)
4000
ns
Enable Time from Shutdown to Low
tRZL(SHDN)
4000
ns
TIME TO SHUTDOWN
tSHDN
50
200
600
ns
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