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參數(shù)資料
| 型號(hào)： | ADM14185E |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | RS-232 Line Drivers/Receivers(±15kV ESD保護(hù),RS-232線驅(qū)動(dòng)器/接收器) |
| 中文描述： | RS - 232線驅(qū)動(dòng)器/接收器（± 15kV的ESD保護(hù)和RS - 232線驅(qū)動(dòng)器/接收器） |
| 文件頁(yè)數(shù)： | 8/13頁(yè) |
| 文件大?。?/td> | 343K |
| 代理商： | ADM14185E |
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ADM14185E
REV. B 08/97
8
PRELIMINARY
DATA
TECHNICAL
GENERAL DESCRIPTION
The AD14185E is a ruggedized RS-232 line driver/
receiver which operates from +5 V and ±12V supplies. It
contains 5 receivers and 3 drivers, and provides a one-
chip solution for 9-pin serial interfaces between data
terminal and data communications equipment.
Features include low power consumption, high transmis-
sion rates and compatibility with the EU directive on
electromagnetic compatibility. EM compatibility includes
protection against radiated and conducted interference in-
cluding high levels of electrostatic discharge.
All RS-232 inputs and outputs contain protection against
electrostatic discharges up to ±15 kV and electrical fast
transients up to ±2 kV. This ensures compliance to
IE1000-4-2 and IEC1000-4-4 requirements.
This device is ideally suited for operation in electrically harsh
environments or where RS-232 cables are frequently being
plugged/unplugged. They are also immune to high RF field
strengths without special shielding precautions. Emissions are
also controlled to within very strict limits.
CIRCUIT DESCRIPTION
The internal circuitry consists of three main sections.
These are:
1. 5 V logic to EIA-232 transmitters.
2. EIA-232 to 5 V logic receivers.
3. Transient protection circuit on all I-O lines.
Transmitter (Driver) Section
The drivers convert 5 V logic input levels into EIA-232
output levels. With V
CC
= +5 V, V+ = 12V, V- = -12V,
and driving an EIA-232 load, the output voltage swing is
typically ±10 V.
Unused inputs may be left unconnected, as an internal
400 ky pull-up resistor pulls them high forcing the
outputs into a low state. The input pull-up resistors
typically source 8 μA when grounded, so unused inputs
should either be connected to V
CC
or left unconnected
in order to minimize power consumption.
Receiver Section
The receivers are inverting level shifters which accept
EIA-232 input levels and translate them into 5 V logic
output levels.
The inputs have internal 5 k
pull-down resistors to
ground and are also protected against overvoltages of up
to ±25 V. The guaranteed switching thresholds are 0.4 V
minimum and 2.4 V maximum. Unconnected inputs are
pulled to 0 V by the internal 5 k
pull-down resistor.
This, therefore, results in a Logic 1 output level for
unconnected inputs or for inputs connected to GND.
The receivers have Schmitt trigger input with a hysteresis
level of 0.5 V. This ensures error-free reception for both
noisy inputs and for inputs with slow transition times.
High Baud Rate
The AD14185E features high slew rates permitting data
transmission at rates well in excess of the EIA-232-E
specifications. RS-232 levels are maintained at data rates
up to 230 kb/s even under worst case loading conditions.
This allows for high speed data links between two
terminals or indeed it is suitable for the new generation modem
standards which requires data rates of 200 kb/s. The slew rate is
internally controlled to less than 30 V/μs in order to minimize EMI
interference.
ESD/EFT Transient Protection Scheme.
The AD14185E uses protective clamping structures on all inputs
and outputs which clamps the voltage to a safe level and dissipates
the energy present in ESD (Electrostatic) and EFT (Electrical Fast
Transients) discharges. A simplified schematic of the protection
structure is shown in Figures 19 and 20. Each input and output
contains two back-to-back high speed clamping diodes. During
normal operation with maximum RS-232 signal levels, the diodes
have no affect as one or the other is reverse
biased depending on the polarity of the signal. If however the volt-
age exceeds about ±50 V, reverse breakdown occurs and the volt-
age is clamped at this level. The diodes are large p-n junctions
which are designed to handle the instantaneous current surge
which can exceed several amperes.
The transmitter outputs and receiver inputs have a similar pro-
tection structure. The receiver inputs can also dissipate some of
the energy through the internal 5 k
resistor to GND as well as
through the protection diodes.
The protection structure achieves ESD protection up to
±15 kV and EFT protection up to ±2 kV on all RS-232 I-
O lines. The methods used to test the protection scheme
are discussed later.
R
IN
RX
D1
D2
RECEIVER
R1
RX
D1
D2
TRANSMITTER
OUTPUT
T
OUT
Figure 20. Transmitter Output Protection Scheme
ESD TESTING (IEC1000-4-2)
IEC1000-4-2 (previously 801-2) specifies compliance
testing using two coupling methods, contact discharge and
air-gap discharge. Contact discharge calls for a direct
connection to the unit being tested. Air-gap discharge uses
a higher test voltage but does not make direct contact with
the unit under test. With air discharge, the discharge gun
is moved towards the unit under test developing an arc
across the air gap, hence the term air-discharge. This method is
influenced by humidity, temperature, barometric pressure,
distance and rate of closure of the discharge gun. The contact-
discharge method while less realistic is more repeatable and is
gaining acceptance in preference to the air-gap method.
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