formula. The values of R
參數(shù)資料
型號(hào)： ADL5561ACPZ-R7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 8/24頁(yè)
文件大?。?/td> 0K
描述： IC AMP DIFF RF/IF 2.9GHZ 16LFCSP
產(chǎn)品培訓(xùn)模塊： Differential Circuit Design Techniques for Communication Applications
標(biāo)準(zhǔn)包裝： 1
放大器類型： RF/IF 差分
電路數(shù)： 1
輸出類型： 差分
轉(zhuǎn)換速率： 9800 V/µs
-3db帶寬： 2.9GHz
電流 - 輸入偏壓： 3µA
電流 - 電源： 40mA
電壓 - 電源，單路/雙路(±)： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-VQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 16-LFCSP-VQ
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面： 551 (CN2011-ZH PDF)
其它名稱： ADL5561ACPZ-R7DKR
ADL5561
Data Sheet
Rev. F | Page 16 of 24
The single-ended gain can be determined using the following
formula. The values of RIN and RX for each gain configuration
are shown in Table 7.
L
X
S
X
S
IN
V
R
A
+
×
+
×
+
×
+
×
+
=
10
2
400
1
(2)
Table 7. Values of RIN and RX for Single-Ended Gain
Gain (dB)
RIN ()
RX ()
5.6
200
R2 || 3071
11.1
100
R2 || 1791
14.1
66.7
R2 || 1321
1
These values are based on a 50 output match.
GAIN ADJUSTMENT AND INTERFACING
The effective gain of the ADL5561 can be reduced using a number
of techniques. A matched attenuator network can reduce the
effective gain, but this requires the addition of a separate
component that can be prohibitive in size and cost. Instead, a
simple voltage divider can be implemented using the combination
of an addition series resistor at the amplifier input and the input
impedance of the ADL5561, as shown in Figure 38. A shunt
resistor is used to match to the impedance of the previous stage.
0.1F
08004-
039
1/2 RSHUNT
1/2 RS
AC
0.1
F 1/
2 RSERIES
VIP1
VIN2
VIN1
VIP2
1/2 RSERIES
1/2 RSHUNT
ADL5561
Figure 38. Gain Adjustment Using Series Resistor
Figure 38 shows a typical implementation of the divider concept
that effectively reduces the gain by adding attenuation at the
input. For frequencies less than 100 MHz, the input impedance
of the ADL5561 can be modeled as a real 133 , 200 , or 400
resistance (differential) for maximum, middle, and minimum
gains, respectively. Assuming that the frequency is low enough
to ignore the shunt reactance of the input and high enough so
that the reactance of moderately sized ac-coupling capacitors
can be considered negligible, the insertion loss, Il, due to the
shunt divider can be expressed as
+
=
IN
SERIES
IN
R
dB
Il
log
20
)
(
(3)
The necessary shunt component, RSHUNT, to match to the source
impedance, RS, can be expressed as
IN
SERIES
S
SHUNT
R
+
=
1
(4)
The insertion loss and the resultant power gain for multiple shunt
resistor values are summarized in Table 8. The source resistance
and input impedance need careful attention when using Equation 3
and Equation 4. The reactance of the input impedance of the
ADL5561 and the ac-coupling capacitors must be considered
before assuming they make a negligible contribution.
Table 8. Gain Adjustment Using Series Resistors
Il (dB)
RIN ()
RS ()
RSERIES ()
RSHUNT ()
2
400
50
105
54.9
4
400
50
232
54.9
2
200
50
51.1
61.9
4
200
50
115
59
2
133
50
34.8
71.5
2
400
200
102
332
4
400
200
232
294
2
200
51.1
976
4
200
115
549
2
400
50
105
54.9
4
400
50
232
54.9
2
200
50
51.1
61.9
ADC INTERFACING
The ADL5561 is a high output linearity amplifier that is optimized
for ADC interfacing. There are several options available to the
designer when using the ADL5561. Figure 39 shows a simplified
wideband interface with the ADL5561 driving the AD9445. The
AD9445 is a 14-bit, 125 MSPS ADC with a buffered wideband input.
For optimum performance, the ADL5561 should be driven dif-
ferentially using an input balun. Figure 39 uses a wideband 1:1
transmission line balun followed by two 34.8 Ω resistors in parallel
with the three input impedances (which change with the gain
selection of the ADL5561) to provide a 50 Ω differential input
impedance. This provides a wideband match to a 50 Ω source.
The ADL5561 is ac-coupled from the AD9445 to avoid common-
mode dc loading. The 33 Ω series resistors help to improve the
isolation between the ADL5561 and any switching currents present
at the analog-to-digital sample-and-hold input circuitry. The
AD9445 input presents a 2 kΩ differential load impedance and
requires a 2 V p-p differential input swing to reach full scale
(VREF = 1 V).
0.1F
08004-
040
34.8
50
AC
0.1
F
ETC1-1-13
VIN1
VIP1
VIP2
A
B
VIN2
34.8
ADL5561
+
0.1F
0.1
F
3.3V
33
VOP
VON
33
+
AD9445
14-BIT ADC
14
VIN+
VIN–
Figure 39. Wideband ADC Interfacing Example Featuring the AD9445
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