參數(shù)資料
型號(hào): ADL5501AKSZ-R7
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: 50 MHz to 4 GHz TruPwr Detector
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6
封裝: ROHS COMPLIANT, MO-203AB, SC-70, 6 PIN
文件頁(yè)數(shù): 23/28頁(yè)
文件大?。?/td> 1654K
代理商: ADL5501AKSZ-R7
ADL5501
EVALUATION BOARD
Figure 56 shows the schematic of the ADL5501 evaluation
board. The layout and silkscreen of the evaluation board layers
are shown in Figure 57 to Figure 60. The board is powered by
a single supply in the 2.7 V to 5.5 V range. The power supply is
decoupled by 100 pF and 0.1 μF capacitors. Table 5 details the
various configuration options of the evaluation board.
Problems caused by impedance mismatch can arise using the
evaluation board to examine the ADL5501 performance. One
way to reduce these problems is to put a coaxial 3 dB attenuator
on the RFIN SMA connector. Mismatches at the source, cable,
and cable interconnection, as well as those occurring on the
evaluation board, can cause these problems.
Rev. 0 | Page 23 of 28
A simple (and common) example of such a problem is triple
travel due to mismatch at both the source and the evaluation
board. Here the signal from the source reaches the evaluation
board and mismatch causes a reflection. When that reflection
reaches the source mismatch, it causes a new reflection, which
travels back to the evaluation board, adding to the original signal
incident at the board. The resultant voltage varies with both
cable length and frequency dependence on the relative phase of
the initial and reflected signals. Placing the 3 dB pad at the input of
the board improves the match at the board and, thus, reduces
the sensitivity to mismatches at the source. When such precau-
tions are taken, measurements are less sensitive to cable length and
other fixture issues. In an actual application when the distance
between ADL5501 and source is short and well defined, this 3 dB
attenuator is not needed.
1
6
2
5
3
4
ADL5501
VPOS
FLTR
RFIN
VRMS
ENBL
COMM
C3
(OPEN)
RFIN
VRMS
R3
0
R5
(OPEN)
R1
VPOS
C1
100pF
C2
0.1μF
R2
(OPEN)
R4
49.9
C4
100nF
VPOS
TO EDGE
CONNECTOR
TO EDGE
CONNECTOR
SW1
ENBL
0
Figure 56. Evaluation Board Schematic
Table 5. Evaluation Board Configuration Options
Component
Description
VPOS, GND
Ground and Supply Vector Pins.
C1, C2
Power Supply Decoupling. The nominal supply decoupling of 100 pF and 0.1 μF.
Default Condition
Not Applicable
C1 = 100 pF (Size 0402)
C2 = 0.1 μF (Size 0402)
C3 = Open (Size 0402)
C3
Filter Capacitor. The internal averaging capacitor can be augmented by placing additional
capacitance in C3.
Output Filtering. The combination of the internal 100 Ω output resistance and C4 produce
a low-pass filter to reduce output ripple. The output can also be scaled down using the
resistor divider pads, R3 and R2. In addition, resistors and capacitors can be placed in C4 and
R2 to load test VRMS.
Device Enable. When the switch is set toward the SW1 label, the ENBL pin is connected to VPOS
and the ADL5501 is in operating mode. In the opposite switch position, the ENBL pin is grounded
(through the 49.9 Ω resistor), putting the device in power-down mode. While in this switch
position, the ENBL pin can be driven by a signal generator via the SMA labeled ENBL. In this
case, R4 serves as a termination resistor for generators requiring a 50 Ω match.
Alternate Interface. R1and R5 allow for VRMS and ENBL to be accessible from the edge
connector, which is used only for characterization.
R2, R3, C4
R2 = Open (Size 0402)
R3 = 0 Ω (Size 0402)
C4 = 100 nF (Size 0402)
R4, SW1
R4 = 49.9 Ω (Size 0402)
SW1 = toward SW1 label
R1, R5
R1 = Open (Size 0402)
R5 = Open (Size 0402)
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