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參數(shù)資料
| 型號(hào)： | ADG823BRM |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | <1 з CMOS 1.8 V to 5.5 V, Dual SPST Switches |
| 中文描述： | DUAL 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO8 |
| 封裝： | MO-187AA, MSOP-8 |
| 文件頁(yè)數(shù)： | 5/12頁(yè) |
| 文件大小： | 333K |
| 代理商： | ADG823BRM |
REV. 0
ADG821/ADG822/ADG823
–5–
TERMINOLOGY
V
DD
GND
I
DD
S
D
IN
R
ON
R
ON
R
FLAT(ON)
Most Positive Power Supply Potential
Ground (0 V) Reference
Positive Supply Current
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input
Ohmic Resistance between D and S
On Resistance Match between any Two Channels (i.e., R
ON
max – R
ON
min)
Flatness is defined as the difference between the maximum and minimum value of on resistance as
measured over the specified analog signal range.
Source Leakage Current with the Switch OFF
Drain Leakage Current with the Switch OFF
Channel Leakage Current with the Switch ON
Analog Voltage on Terminals D and S
Maximum Input Voltage for Logic “0”
Minimum Input Voltage for Logic “1”
Input Current of the Digital Input
OFF Switch Source Capacitance
OFF Switch Drain Capacitance
ON Switch Capacitance
Delay between Applying the Digital Control Input and the Output Switching ON
Delay between Applying the Digital Control Input and the Output Switching OFF
OFF time or ON time measured between the 90% points of both switches, when switching from one
address state to another.
It is a measure of the glitch impulse transferred from the digital input to the analog output during switching.
It is a measure of unwanted signal that is coupled through from one channel to another as a result
of parasitic capacitance.
A Measure of Unwanted Signal Coupling through an OFF Switch
The Frequency at which the Output Is Attenuated by –3 dBs
The Frequency Response of the ON Switch
The Loss due to the On Resistance of the Switch
I
S
(OFF)
I
D
(OFF)
I
D
, I
S
(ON)
V
D
(V
S
)
V
INL
V
INH
I
INL
(I
INH
)
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
t
ON
t
OFF
t
BBM
Charge Injection
Crosstalk
Off Isolation
Bandwidth
On Response
Insertion Loss
PIN CONFIGURATION
8-Lead MSOP
(RM-8)
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
S1
D1
IN2
VDD
D2
S2
GND
ADG821/
ADG822/
ADG823
IN1
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