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參數(shù)資料
型號: ADG636YRU
廠商: Analog Devices Inc
文件頁數(shù): 7/16頁
文件大?。?/td> 0K
描述: IC SWITCH DUAL SPDT 14TSSOP
產(chǎn)品培訓模塊: Switch Fundamentals
產(chǎn)品變化通告: Product Discontinuance 27/Oct/2011
標準包裝: 96
功能: 開關(guān)
電路: 2 x SPDT - NC/NO
導(dǎo)通狀態(tài)電阻: 290 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.5 V,±2.7 V ~ 5.5 V
電流 - 電源: 1nA
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
ADG636
Rev. B | Page 15 of 16
TERMINOLOGY
VDD
Most positive supply potential.
VSS
Most negative power supply in a dual-supply application.
In single-supply applications, this should be tied to ground at
the device.
GND
Ground (0 V) reference.
IDD
Positive supply current.
ISS
Negative supply current.
S
Source terminal. May be an input or output.
D
Drain terminal. May be an input or output.
RON
Ohmic resistance between Terminal D and Terminal S.
ΔRON
On resistance match between any two channels (that is,
RON max RON min).
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum values of on resistance as measured over the specified
analog signal range.
IS (Off)
Source leakage current with the switch off.
ID (Off)
Drain leakage current with the switch off.
ID (On), IS (On)
Channel leakage current with the switch on.
VD, VS
Analog voltage on Terminal D and Terminal S.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL(IINH)
Input current of the digital input.
CS (Off)
Channel input capacitance for the off condition.
CD (Off)
Channel output capacitance for the off condition.
CD (On), CS (On)
On switch capacitance.
CIN
Digital input capacitance.
tON (EN)
Delay time between the 50% and 90% points of the digital input
and the switch on condition.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and the switch off condition.
tTRANSITION
Delay time between the 50% and 90% points of the digital input
and the switch on condition when switching from one address
state to another.
tBBM
Off time or on time measured between the 80% points of both
switches when switching from one address state to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Bandwidth
The frequency response of the on switch.
Insertion Loss
Loss due to the on resistance of the switch.
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