參數(shù)資料
型號(hào): ADG633YCP
廠商: ANALOG DEVICES INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: CMOS +V/+5 V/+3 V Triple SPDT Switch
中文描述: TRIPLE 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, QCC16
封裝: 4 X 4 MM, MO-220VGGC, LFCSP-16
文件頁數(shù): 6/12頁
文件大?。?/td> 546K
代理商: ADG633YCP
ADG633
–6–
TERMINOLOGY
Parameter
V
DD
V
SS
I
DD
I
SS
GND
S
D
A
X
EN
Definition
Most Positive Power Supply Potential.
Most Negative Power Supply Potential.
Positive Supply Current.
Negative Supply Current.
Ground (0 V) Reference.
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input.
Active Low Digital Input. When high, device is disabled and all switches are OFF. When low, A
X
logic inputs
determine ON switches.
Analog Voltage on Terminals D, S.
Ohmic Resistance between D and S.
On Resistance Match between Any Two Channels, i.e., R
ON
max – R
ON
min.
Flatness is defined as the difference between the maximum and minimum value of On Resistance as
measured over the specified analog signal range.
Source Leakage Current with the Switch OFF.
Drain Leakage Current with the Switch OFF.
Channel Leakage Current with the Switch ON.
Maximum Input Voltage for Logic 0.
Minimum Input Voltage for Logic 1.
Input Current of the Digital Input.
OFF Switch Source Capacitance. Measured with reference to ground.
OFF Switch Drain Capacitance. Measured with reference to ground.
ON Switch Capacitance. Measured with reference to ground.
Digital Input Capacitance.
Delay between Applying the Digital Control Input and the Output Switching ON. See Test Circuit 7.
Delay between Applying the Digital Control Input and the Output Switching OFF.
ON Time, measured between 80% points of both switches when switching from one address state to another.
Charge Injection A Measure of the Glitch Impulse Transferred from the Digital Input to the Analog Output during Switching.
OFF Isolation
A Measure of Unwanted Signal Coupling through an OFF Switch.
Crosstalk
A measure of unwanted signal that is coupled through from one channel to another as a result of
parasitic capacitance.
Bandwidth
The Frequency at which the Output Is Attenuated by 3 dB.
ON Response
The Frequency Response of the ON Switch.
Insertion Loss
The Loss Due to the On Resistance of the Switch.
V
D,
V
S
R
ON
R
ON
FLAT(ON)
R
I
S
(OFF)
I
D
(OFF)
I
D
, I
S
(ON)
V
INL
V
INH
I
INL,
I
INH
C
S
(OFF)
C
D
(OFF)
C
D
,C
S
(ON)
C
IN
t
ON
(
EN
)
t
OFF
(
EN
)
t
BBM
REV. 0
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