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參數(shù)資料
| 型號： | ADG3248 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 2.5 V/ 3.3 V, 2 :1 Multiplexer/ Demultiplexer Bus Switch |
| 中文描述： | 2.5伏/ 3.3伏，2：1多路復(fù)用器/解復(fù)用器總線開關(guān) |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 172K |
| 代理商： | ADG3248 |
REV. 0
–2–
ADG3248–SPECIFICATIONS
1
B Version
Min
Typ
2
Parameter
Symbol
Conditions
Max
Unit
DC ELECTRICAL CHARACTERISTICS
Input High Voltage
V
INH
V
INH
V
INL
V
INL
I
I
I
OZ
V
CC
= 2.7 V to 3.6 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 2.3 V to 2.7 V
2.0
1.7
V
V
V
V
μ
A
μ
A
μ
A
V
V
Input Low Voltage
0.8
0.7
±
1
±
1
±
1
2.9
2.1
Input Leakage Current
OFF State Leakage Current
ON State Leakage Current
Maximum Pass Voltage
±
0.01
±
0.01
±
0.01
2.5
1.8
0
≤
A, B
≤
V
CC
0
≤
A, B
≤
V
CC
V
A
/V
B
= V
CC
= 3.3 V, I
O
= –5
μ
A
V
A
/V
B
= V
CC
= 2.5 V, I
O
= –5
μ
A
V
P
2.0
1.5
CAPACITANCE
3
A Port Off Capacitance
B Port Off Capacitance
A, B Port On Capacitance
Control Input Capacitance
C
A
OFF
C
B
OFF
C
A
, C
B
ON
C
IN
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 1 MHz
3.5
4.5
8.5
4
pF
pF
pF
pF
SWITCHING CHARACTERISTICS
3
Propagation Delay A to B or B to A, t
PD4
Propagation Delay Matching
5
Transition Time
Break-before-Make Time
Maximum Data Rate
Channel Jitter
t
PHL
, t
PLH
C
L
= 50 pF, V
CC
= 3 V
0.225
5
29
ns
ps
ns
ns
Gbps
ps p-p
t
TRANS
t
BBM
R
L
= 510
, C
L
= 50 pF
R
L
= 510
, C
L
= 50 pF
V
CC
= 3.3 V; V
A
/V
B
= 2 V
V
CC
= 3.3 V; V
A
/V
B
= 2 V
16
10
1.244
45
5
DIGITAL SWITCH
On Resistance
R
ON
V
CC
= 3 V, V
A
= 0 V, I
BA
= 8 mA
V
CC
= 3 V, V
A
= 1.7 V, I
BA
= 8 mA
V
CC
= 2.3 V, V
A
= 0 V, I
BA
= 8 mA
V
CC
= 2.3 V, V
A
= 1 V, I
BA
= 8 mA
V
CC
= 3 V, V
A
= 0 V, I
A
= 8 mA
4.5
12
5
9
0.1
8
28
9
18
0.5
On Resistance Matching
R
ON
POWER REQUIREMENTS
V
CC
Quiescent Power Supply Current
2.3
3.6
1
V
μ
A
I
CC
Digital Inputs = 0 V or V
CC
0.01
NOTES
1
Temperature range is as follows: B Version: –40
°
C to +85
°
C.
2
Typical values are at 25
°
C, unless otherwise stated.
3
Guaranteed by design, not subject to production test.
4
The digital switch contributes no propagation delay other than the RC delay of the typical R
of the switch and the load capacitance when driven by an ideal voltage
source. Since the time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation delay
of the digital switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.
5
Propagation delay matching between channels is calculated from the on resistance matching and load capacitance of 50 pF.
Specifications subject to change without notice.
(V
= 2.3 V to 3.6 V, GND = 0 V, all specifications T
MIN
to T
MAX
, unless
otherwise noted.)
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| ADG3248BKS-REEL7 | 制造商:Analog Devices 功能描述:Multiplexer/Demultiplexer Bus Switch 1-Element CMOS 2-IN 6-Pin SC-70 T/R 制造商:Rochester Electronics LLC 功能描述: |
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