- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗1895 > ADG1421BRMZ (Analog Devices Inc)IC SW SPST 2.1OHM RON 10MSOP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | ADG1421BRMZ |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 6/16闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC SW SPST 2.1OHM RON 10MSOP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 50 |
| 绯诲垪锛� | iCMOS® |
| 鍔熻兘锛� | 闁嬮棞(gu膩n) |
| 闆昏矾锛� | 2 x SPST - NO |
| 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆锛� | 4.6 姝愬 |
| 闆诲闆绘簮锛� | 鍠�/闆欓浕婧� |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 5 V ~ 16.5 V锛�±2.25 V ~ 8.25 V |
| 闆绘祦 - 闆绘簮锛� | 120µA |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 10-TFSOP锛�10-MSOP锛�0.118"锛�3.00mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 10-MSOP |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 801 (CN2011-ZH PDF) |
ADG1421/ADG1422/ADG1423
Rev. 0 | Page 14 of 16
TERMINOLOGY
IDD
The positive supply current.
ISS
The negative supply current.
VD (VS)
The analog voltage on Terminal D and Terminal S.
RON
The ohmic resistance between Terminal D and Terminal S.
RFLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
IS (Off)
The source leakage current with the switch off.
ID (Off)
The drain leakage current with the switch off.
ID, IS (On)
The channel leakage current with the switch on.
VINL
The maximum input voltage for Logic 0.
VINH
The minimum input voltage for Logic 1.
IINL (IINH)
The input current of the digital input.
CS (Off)
The off switch source capacitance, measured with reference to
ground.
CD (Off)
The off switch drain capacitance, measured with reference to
ground.
CD, CS (On)
The on switch capacitance, measured with reference to ground.
CIN
The digital input capacitance.
tON (EN)
Delay time between the 50% and 90% points of the digital input
and switch on condition. See Figure 26.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and switch off condition. See Figure 26.
tTRANSITION
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
TBBM
Off time measured between the 80% point of both switches
when switching from one address state to another. See Figure 27.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching. See Figure 28.
Off Isolation
A measure of unwanted signal coupling through an off switch.
See Figure 29.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance. See
Bandwidth
The frequency at which the output is attenuated by 3 dB. See
On Response
The frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch. See Figure 31.
THD + N
The ratio of the harmonic amplitude plus noise of the signal to
the fundamental. See Figure 32.
AC Power Supply Rejection Ratio (ACPSRR)
ACPSRR measures the ability of a part to avoid coupling noise
and spurious signals that appear on the supply voltage pin to the
output of the switch. The dc voltage on the device is modulated
by a sine wave of 0.62 V p-p. The ratio of the amplitude of signal on
the output to the amplitude of the modulation is the ACPSRR.
See Figure 22.
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
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| ADG1421BRMZ-REEL7 | 鍔熻兘鎻忚堪:IC SW SPST 2.1OHM RON 10MSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 妯℃摤闁嬮棞(gu膩n)锛屽璺京(f霉)鐢ㄥ櫒锛屽璺垎瑙ｅ櫒 绯诲垪:iCMOS® 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 鍔熻兘:澶氳矾寰�(f霉)鐢ㄥ櫒 闆昏矾:1 x 4:1 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆:- 闆诲闆绘簮:闆欓浕婧� 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):±5V 闆绘祦 - 闆绘簮:7mA 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:16-SOIC锛�0.154"锛�3.90mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-SOIC 鍖呰:甯跺嵎 (TR) |
| ADG1422 | 鍒堕€犲晢:AD 鍒堕€犲晢鍏ㄧū:Analog Devices 鍔熻兘鎻忚堪:2.1 惟 On Resistance, 卤15 V/+12 V/卤5 V iCMOS Dual SPST Switches |
| ADG1422BCPZ-REEL7 | 鍔熻兘鎻忚堪:IC SW SPST 2.1OHM RON 10LFCSP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 妯℃摤闁嬮棞(gu膩n)锛屽璺京(f霉)鐢ㄥ櫒锛屽璺垎瑙ｅ櫒 绯诲垪:iCMOS® 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 鍔熻兘:澶氳矾寰�(f霉)鐢ㄥ櫒 闆昏矾:1 x 4:1 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆:- 闆诲闆绘簮:闆欓浕婧� 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):±5V 闆绘祦 - 闆绘簮:7mA 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:16-SOIC锛�0.154"锛�3.90mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-SOIC 鍖呰:甯跺嵎 (TR) |
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| ADG1422BRMZ-REEL7 | 鍔熻兘鎻忚堪:IC SW SPST 2.1OHM RON 10MSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 妯℃摤闁嬮棞(gu膩n)锛屽璺京(f霉)鐢ㄥ櫒锛屽璺垎瑙ｅ櫒 绯诲垪:iCMOS® 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 鍔熻兘:澶氳矾寰�(f霉)鐢ㄥ櫒 闆昏矾:1 x 4:1 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆:- 闆诲闆绘簮:闆欓浕婧� 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):±5V 闆绘祦 - 闆绘簮:7mA 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:16-SOIC锛�0.154"锛�3.90mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-SOIC 鍖呰:甯跺嵎 (TR) |
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