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參數(shù)資料
| 型號： | ADF4360-5BCPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SYNTHESIZER VCO 24LFCSP |
| 標準包裝： | 5,000 |
| 類型： | 扇出配送，整數(shù)-N，合成器（RF） |
| PLL： | 是 |
| 輸入： | CMOS，TTL |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 1.4GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 帶卷 (TR) |
Data Sheet
ADF4360-5
Rev. B | Page 17 of 24
Hardware Power-Up/Power-Down
If the ADF4360-5 is powered down via the hardware (using the
CE pin) and powered up again without any change to the N
counter register during power-down, it locks at the correct fre-
quency because it is already in the correct frequency band. The
lock time depends on the value of capacitance on the CN pin,
which is <5 ms for 10 F capacitance. The smaller capacitance
of 440 nF on this pin enables lock times of <600 s.
The N counter value cannot be changed while the part is in
power-down because the part may not lock to the correct fre-
quency on power-up. If it is updated, the correct programming
sequence for it after power-up is to the R counter latch, followed
by the control latch, and finally the N counter latch, with the
required interval between the control latch and N counter latch,
as described in the Initial Power-Up section.
Software Power-Up/Power-Down
If the ADF4360-5 is powered down via the software (using the
control latch) and powered up again without any change to the
N counter latch during power-down, it locks at the correct fre-
quency because it is already in the correct frequency band. The
lock time depends on the value of capacitance on the CN pin,
which is <5 ms for 10 F capacitance. The smaller capacitance
of 440 nF on this pin enables lock times of <600 s.
The N counter value cannot be changed while it is in power-
down because the part may not lock to the correct frequency on
power-up. If it is updated, the correct programming sequence
for it after power-up is to the R counter latch, followed by the
control latch, and finally the N counter latch, with the required
interval between the control latch and N counter latch, as de-
scribed in the Initial Power-Up section.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADF4360-5BCPZRL7 | 功能描述:IC SYNTHESIZER VCO 24LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4360-6 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MHz to 6 GHz Broadband Quadrature Modulator |
| ADF4360-6BCP | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 24-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:INT. SYNTHESIZER & VCO - 1000 - 1250 MHZ - Bulk 制造商:Analog Devices 功能描述:IC SYNTHESIZER PLL |
| ADF4360-6BCPRL | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 24-Pin LFCSP EP T/R |
| ADF4360-6BCPRL7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 24-Pin LFCSP EP T/R 制造商:Rochester Electronics LLC 功能描述:INT. SYNTHESIZER & VCO - 1000 - 1250 MHZ - Bulk |
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