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參數資料
| 型號： | ADE7762ARW-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | Polyphase Energy Metering IC with Phase Drop Indication |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 封裝： | MS-013AE, SOIC-28 |
| 文件頁數： | 5/28頁 |
| 文件大小： | 363K |
| 代理商： | ADE7762ARW-RL |
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Preliminary Technical Data
ADE7762
Rev. PrB | Page 5 of 28
TIMING CHARACTERISTICS
V
DD
= 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, CLKIN = 10 MHz, T
MIN
to T
MAX
= 40°C to +85°C, unless otherwise noted.
Table 2.
Parameter
1,2
Conditions
t
1 3
F1 and F2 pulse width (logic high)
t
2
Output pulse period (see the Transfer Function section)
Specification
120
Unit
ms
sec
See Figure 2
t
3
Time between F1 falling edge and F2 falling edge
1/2 t
2
sec
t
43, 4
CF pulse width (logic high)
90
ms
t
55
CF pulse period (see the Transfer Function section)
See Table 7
sec
t
6
Minimum time between F1 and F2 pulse
4/CLKIN
sec
t
7
LED_CTRL pulse width
28.8
μ
s
t
8
LED_CTRL period
57.5
μ
s
t
9
LED pulse width
7.2
μ
s
1
Sample tested during initial release and after any redesign or process changes that might affect this parameter.
2
See Figure 2.
3
The pulse widths of F1, F2, and CF are not fixed for higher output frequencies (see the Frequency Outputs section).
4
CF is not synchronous to F1 or F2 frequency outputs.
5
The CF pulse is always 1 μs in the high frequency mode (see the Frequency Outputs section).
F1
F2
CF
t
1
t
6
t
2
t
3
t
4
t
5
0
Figure 2. Timing Diagram for Frequency Outputs
L
L
L
N
U
L
L
L
N
U
t
9
t
8
t
7
0
Figure 3: Timing Diagram for LED Drivers
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